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MpLib.h
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1
11#ifndef _MP_LIB_H_
12#define _MP_LIB_H_
13
14#include <PiPei.h>
15
17#include <Register/Amd/Cpuid.h>
18#include <Register/Amd/Ghcb.h>
19#include <Register/Intel/Msr.h>
22
23#include <Library/MpInitLib.h>
24#include <Library/BaseLib.h>
27#include <Library/DebugLib.h>
29#include <Library/CpuLib.h>
30#include <Library/UefiCpuLib.h>
31#include <Library/TimerLib.h>
33#include <Library/MtrrLib.h>
34#include <Library/HobLib.h>
35#include <Library/PcdLib.h>
38
40#include <Register/Amd/Ghcb.h>
41
43
44#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')
45
46#define CPU_INIT_MP_LIB_HOB_GUID \
47 { \
48 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \
49 }
50
51//
52// The MP data for switch BSP
53//
54#define CPU_SWITCH_STATE_IDLE 0
55#define CPU_SWITCH_STATE_STORED 1
56#define CPU_SWITCH_STATE_LOADED 2
57
58//
59// Default maximum number of entries to store the microcode patches information
60//
61#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8
62
63//
64// Data structure for microcode patch information
65//
66typedef struct {
67 UINTN Address;
68 UINTN Size;
70
71//
72// CPU exchange information for switch BSP
73//
74typedef struct {
75 UINT8 State; // offset 0
76 UINTN StackPointer; // offset 4 / 8
77 IA32_DESCRIPTOR Gdtr; // offset 8 / 16
78 IA32_DESCRIPTOR Idtr; // offset 14 / 26
80
81//
82// AP loop state when APs are in idle state
83// It's value is the same with PcdCpuApLoopMode
84//
85typedef enum {
86 ApInHltLoop = 1,
87 ApInMwaitLoop = 2,
88 ApInRunLoop = 3
89} AP_LOOP_MODE;
90
91//
92// AP initialization state during APs wakeup
93//
94typedef enum {
95 ApInitConfig = 1,
96 ApInitReconfig = 2,
97 ApInitDone = 3
98} AP_INIT_STATE;
99
100//
101// AP state
102//
103// The state transitions for an AP when it process a procedure are:
104// Idle ----> Ready ----> Busy ----> Idle
105// [BSP] [AP] [AP]
106//
107typedef enum {
108 CpuStateIdle,
109 CpuStateReady,
110 CpuStateBusy,
111 CpuStateFinished,
112 CpuStateDisabled
113} CPU_STATE;
114
115//
116// CPU volatile registers around INIT-SIPI-SIPI
117//
118typedef struct {
119 UINTN Cr0;
120 UINTN Cr3;
121 UINTN Cr4;
122 UINTN Dr0;
123 UINTN Dr1;
124 UINTN Dr2;
125 UINTN Dr3;
126 UINTN Dr6;
127 UINTN Dr7;
128 IA32_DESCRIPTOR Gdtr;
129 IA32_DESCRIPTOR Idtr;
130 UINT16 Tr;
132
133//
134// AP related data
135//
136typedef struct {
137 SPIN_LOCK ApLock;
138 volatile UINT32 *StartupApSignal;
139 volatile UINTN ApFunction;
140 volatile UINTN ApFunctionArgument;
141 BOOLEAN CpuHealthy;
142 volatile CPU_STATE State;
143 CPU_VOLATILE_REGISTERS VolatileRegisters;
144 BOOLEAN Waiting;
145 BOOLEAN *Finished;
146 UINT64 ExpectedTime;
147 UINT64 CurrentTime;
148 UINT64 TotalTime;
149 EFI_EVENT WaitEvent;
150 UINT32 ProcessorSignature;
151 UINT8 PlatformId;
152 UINT64 MicrocodeEntryAddr;
153 UINT32 MicrocodeRevision;
154 SEV_ES_SAVE_AREA *SevEsSaveArea;
156
157//
158// Basic CPU information saved in Guided HOB.
159// Because the contents will be shard between PEI and DXE,
160// we need to make sure the each fields offset same in different
161// architecture.
162//
163#pragma pack (1)
164typedef struct {
165 UINT32 InitialApicId;
166 UINT32 ApicId;
167 UINT32 Health;
168 UINT64 ApTopOfStack;
170#pragma pack ()
171
172//
173// AP reset code information including code address and size,
174// this structure will be shared be C code and assembly code.
175// It is natural aligned by design.
176//
177typedef struct {
178 UINT8 *RendezvousFunnelAddress;
179 UINTN ModeEntryOffset;
180 UINTN RendezvousFunnelSize;
181 UINT8 *RelocateApLoopFuncAddress;
182 UINTN RelocateApLoopFuncSize;
183 UINTN ModeTransitionOffset;
184 UINTN SwitchToRealNoNxOffset;
185 UINTN SwitchToRealPM16ModeOffset;
186 UINTN SwitchToRealPM16ModeSize;
188
189typedef struct _CPU_MP_DATA CPU_MP_DATA;
190
191#pragma pack(1)
192
193//
194// MP CPU exchange information for AP reset code
195// This structure is required to be packed because fixed field offsets
196// into this structure are used in assembly code in this module
197//
198typedef struct {
199 UINTN StackStart;
200 UINTN StackSize;
201 UINTN CFunction;
202 IA32_DESCRIPTOR GdtrProfile;
203 IA32_DESCRIPTOR IdtrProfile;
204 UINTN BufferStart;
205 UINTN ModeOffset;
206 UINTN ApIndex;
207 UINTN CodeSegment;
208 UINTN DataSegment;
209 UINTN EnableExecuteDisable;
210 UINTN Cr3;
211 UINTN InitFlag;
212 CPU_INFO_IN_HOB *CpuInfo;
213 UINTN NumApsExecuting;
214 CPU_MP_DATA *CpuMpData;
215 UINTN InitializeFloatingPointUnitsAddress;
216 UINT32 ModeTransitionMemory;
217 UINT16 ModeTransitionSegment;
218 UINT32 ModeHighMemory;
219 UINT16 ModeHighSegment;
220 //
221 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.
222 //
223 BOOLEAN Enable5LevelPaging;
224 BOOLEAN SevEsIsEnabled;
225 BOOLEAN SevSnpIsEnabled;
226 UINTN GhcbBase;
227 BOOLEAN ExtTopoAvail;
229
230#pragma pack()
231
232//
233// CPU MP Data save in memory
234//
236 UINT64 CpuInfoInHob;
237 UINT32 CpuCount;
238 UINT32 BspNumber;
239 //
240 // The above fields data will be passed from PEI to DXE
241 // Please make sure the fields offset same in the different
242 // architecture.
243 //
244 SPIN_LOCK MpLock;
245 UINTN Buffer;
246 UINTN CpuApStackSize;
247 MP_ASSEMBLY_ADDRESS_MAP AddressMap;
248 UINTN WakeupBuffer;
249 UINTN WakeupBufferHigh;
250 UINTN BackupBuffer;
251 UINTN BackupBufferSize;
252
253 volatile UINT32 FinishedCount;
254 UINT32 RunningCount;
255 BOOLEAN SingleThread;
256 EFI_AP_PROCEDURE Procedure;
257 VOID *ProcArguments;
258 BOOLEAN *Finished;
259 UINT64 ExpectedTime;
260 UINT64 CurrentTime;
261 UINT64 TotalTime;
262 EFI_EVENT WaitEvent;
263 UINTN **FailedCpuList;
264
265 AP_INIT_STATE InitFlag;
266 BOOLEAN SwitchBspFlag;
267 UINTN NewBspNumber;
270 MTRR_SETTINGS MtrrTable;
271 UINT8 ApLoopMode;
272 UINT8 ApTargetCState;
273 UINT16 PmCodeSegment;
274 UINT16 Pm16CodeSegment;
275 CPU_AP_DATA *CpuData;
276 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;
277
278 UINT32 CurrentTimerCount;
279 UINTN DivideValue;
280 UINT8 Vector;
281 BOOLEAN PeriodicMode;
282 BOOLEAN TimerInterruptState;
283 UINT64 MicrocodePatchAddress;
284 UINT64 MicrocodePatchRegionSize;
285
286 //
287 // Whether need to use Init-Sipi-Sipi to wake up the APs.
288 // Two cases need to set this value to TRUE. One is in HLT
289 // loop mode, the other is resume from S3 which loop mode
290 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm
291 // driver.
292 //
293 BOOLEAN WakeUpByInitSipiSipi;
294
295 BOOLEAN SevEsIsEnabled;
296 BOOLEAN SevSnpIsEnabled;
297 BOOLEAN UseSevEsAPMethod;
298 UINTN SevEsAPBuffer;
299 UINTN SevEsAPResetStackStart;
300 CPU_MP_DATA *NewCpuMpData;
301
302 UINT64 GhcbBase;
303};
304
305#define AP_SAFE_STACK_SIZE 128
306#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE
307
308#pragma pack(1)
309
310typedef struct {
311 UINT8 InsnBuffer[8];
312 UINT16 Rip;
313 UINT16 Segment;
315
316#pragma pack()
317
331typedef
333(EFIAPI AP_RESET)(
334 IN UINTN BufferStart,
335 IN UINT16 Code16,
336 IN UINT16 Code32,
337 IN UINTN StackStart
338 );
339
340extern EFI_GUID mCpuInitMpLibHobGuid;
341
356typedef
358(EFIAPI *ASM_RELOCATE_AP_LOOP)(
359 IN BOOLEAN MwaitSupport,
360 IN UINTN ApTargetCState,
361 IN UINTN PmCodeSegment,
362 IN UINTN TopOfApStack,
363 IN UINTN NumberToFinish,
364 IN UINTN Pm16CodeSegment,
365 IN UINTN SevEsAPJumpTable,
366 IN UINTN WakeupBuffer
367 );
368
375VOID
376EFIAPI
378 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap
379 );
380
390VOID
391EFIAPI
394 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo
395 );
396
404 VOID
405 );
406
412VOID
414 IN CPU_MP_DATA *CpuMpData
415 );
416
425UINTN
427 IN UINTN WakeupBufferSize
428 );
429
442UINTN
444 IN UINTN BufferSize
445 );
446
455UINTN
457 VOID
458 );
459
471VOID
472WakeUpAP (
473 IN CPU_MP_DATA *CpuMpData,
474 IN BOOLEAN Broadcast,
475 IN UINTN ProcessorNumber,
476 IN EFI_AP_PROCEDURE Procedure OPTIONAL,
477 IN VOID *ProcedureArgument OPTIONAL,
478 IN BOOLEAN WakeUpDisabledAps
479 );
480
486VOID
488 IN CPU_MP_DATA *CpuMpData
489 );
490
525 IN EFI_AP_PROCEDURE Procedure,
526 IN BOOLEAN SingleThread,
527 IN BOOLEAN ExcludeBsp,
528 IN EFI_EVENT WaitEvent OPTIONAL,
529 IN UINTN TimeoutInMicroseconds,
530 IN VOID *ProcedureArgument OPTIONAL,
531 OUT UINTN **FailedCpuList OPTIONAL
532 );
533
559 IN EFI_AP_PROCEDURE Procedure,
560 IN UINTN ProcessorNumber,
561 IN EFI_EVENT WaitEvent OPTIONAL,
562 IN UINTN TimeoutInMicroseconds,
563 IN VOID *ProcedureArgument OPTIONAL,
564 OUT BOOLEAN *Finished OPTIONAL
565 );
566
580 IN UINTN ProcessorNumber,
581 IN BOOLEAN EnableOldBSP
582 );
583
600 IN UINTN ProcessorNumber,
601 IN BOOLEAN EnableAP,
602 IN UINT32 *HealthFlag OPTIONAL
603 );
604
612 VOID
613 );
614
628 IN UINTN ProcessorNumber
629 );
630
643 VOID
644 );
645
650VOID
652 VOID
653 );
654
663VOID
665 IN CPU_MP_DATA *CpuMpData,
666 IN UINTN ProcessorNumber
667 );
668
674VOID
676 IN OUT CPU_MP_DATA *CpuMpData
677 );
678
694BOOLEAN
696 UINT64 *Address,
697 UINT64 *RegionSize
698 );
699
706BOOLEAN
708 VOID
709 );
710
715VOID
717 VOID
718 );
719
731 IN CPU_MP_DATA *CpuMpData,
732 OUT UINTN *ProcessorNumber
733 );
734
748 IN OUT CPU_MP_DATA *CpuMpData
749 );
750
756VOID
758 IN OUT CPU_MP_DATA *CpuMpData
759 );
760
766VOID
768 IN UINTN SipiVector
769 );
770
776VOID
778 CPU_MP_DATA *CpuMpData
779 );
780
787BOOLEAN
788EFIAPI
790 CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr
791 );
792
798VOID
800 IN volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo
801 );
802
811UINT32
813 IN EFI_PHYSICAL_ADDRESS PageAddress,
814 IN BOOLEAN VmsaPage
815 );
816
824VOID
826 IN CPU_MP_DATA *CpuMpData,
827 IN CPU_AP_DATA *CpuData,
828 UINT32 ApicId
829 );
830
838VOID
840 IN CPU_MP_DATA *CpuMpData,
841 IN INTN ProcessorNumber
842 );
843
844#endif
UINT64 UINTN
INT64 INTN
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
EFI_STATUS StartupThisAPWorker(IN EFI_AP_PROCEDURE Procedure, IN UINTN ProcessorNumber, IN EFI_EVENT WaitEvent OPTIONAL, IN UINTN TimeoutInMicroseconds, IN VOID *ProcedureArgument OPTIONAL, OUT BOOLEAN *Finished OPTIONAL)
Definition: MpLib.c:2626
VOID AllocateSevEsAPMemory(IN OUT CPU_MP_DATA *CpuMpData)
Definition: AmdSev.c:131
CPU_MP_DATA * GetCpuMpDataFromGuidedHob(VOID)
Definition: MpLib.c:2720
VOID EFIAPI AsmExchangeRole(IN CPU_EXCHANGE_ROLE_INFO *MyInfo, IN CPU_EXCHANGE_ROLE_INFO *OthersInfo)
EFI_STATUS EnableDisableApWorker(IN UINTN ProcessorNumber, IN BOOLEAN EnableAP, IN UINT32 *HealthFlag OPTIONAL)
Definition: MpLib.c:2295
VOID SetSevEsJumpTable(IN UINTN SipiVector)
Definition: AmdSev.c:147
typedef VOID(EFIAPI AP_RESET)(IN UINTN BufferStart
VOID CheckAndUpdateApsStatus(VOID)
Definition: DxeMpLib.c:237
UINT32 SevSnpRmpAdjust(IN EFI_PHYSICAL_ADDRESS PageAddress, IN BOOLEAN VmsaPage)
Definition: AmdSev.c:61
VOID ShadowMicrocodeUpdatePatch(IN OUT CPU_MP_DATA *CpuMpData)
Definition: Microcode.c:330
UINTN GetWakeupBuffer(IN UINTN WakeupBufferSize)
Definition: DxeMpLib.c:88
VOID WakeUpAP(IN CPU_MP_DATA *CpuMpData, IN BOOLEAN Broadcast, IN UINTN ProcessorNumber, IN EFI_AP_PROCEDURE Procedure OPTIONAL, IN VOID *ProcedureArgument OPTIONAL, IN BOOLEAN WakeUpDisabledAps)
Definition: MpLib.c:1120
BOOLEAN EFIAPI ConfidentialComputingGuestHas(CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr)
VOID EFIAPI AsmGetAddressMap(OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap)
VOID SevSnpCreateAP(IN CPU_MP_DATA *CpuMpData, IN INTN ProcessorNumber)
Definition: AmdSev.c:41
BOOLEAN IsMwaitSupport(VOID)
Definition: MpLib.c:260
VOID MicrocodeDetect(IN CPU_MP_DATA *CpuMpData, IN UINTN ProcessorNumber)
Definition: Microcode.c:20
EFI_STATUS GetProcessorNumber(IN CPU_MP_DATA *CpuMpData, OUT UINTN *ProcessorNumber)
Definition: MpLib.c:445
BOOLEAN GetMicrocodePatchInfoFromHob(UINT64 *Address, UINT64 *RegionSize)
Definition: Microcode.c:358
EFI_STATUS StartupAllCPUsWorker(IN EFI_AP_PROCEDURE Procedure, IN BOOLEAN SingleThread, IN BOOLEAN ExcludeBsp, IN EFI_EVENT WaitEvent OPTIONAL, IN UINTN TimeoutInMicroseconds, IN VOID *ProcedureArgument OPTIONAL, OUT UINTN **FailedCpuList OPTIONAL)
Definition: MpLib.c:2468
EFI_STATUS CheckThisAP(IN UINTN ProcessorNumber)
Definition: MpLib.c:1584
EFI_STATUS SwitchBSPWorker(IN UINTN ProcessorNumber, IN BOOLEAN EnableOldBSP)
Definition: MpLib.c:2152
VOID SevEsPlaceApHlt(CPU_MP_DATA *CpuMpData)
Definition: AmdSev.c:196
UINTN AllocateCodeBuffer(IN UINTN BufferSize)
Definition: DxeMpLib.c:165
VOID FillExchangeInfoDataSevEs(IN volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo)
Definition: AmdSev.c:249
CPU_MP_DATA * GetCpuMpData(VOID)
Definition: DxeMpLib.c:58
EFI_STATUS CheckAllAPs(VOID)
Definition: MpLib.c:1641
EFI_STATUS PlatformShadowMicrocode(IN OUT CPU_MP_DATA *CpuMpData)
Definition: DxeMpLib.c:986
UINTN GetSevEsAPMemory(VOID)
Definition: DxeMpLib.c:195
VOID InitMpGlobalData(IN CPU_MP_DATA *CpuMpData)
Definition: DxeMpLib.c:463
VOID(EFIAPI * ASM_RELOCATE_AP_LOOP)(IN BOOLEAN MwaitSupport, IN UINTN ApTargetCState, IN UINTN PmCodeSegment, IN UINTN TopOfApStack, IN UINTN NumberToFinish, IN UINTN Pm16CodeSegment, IN UINTN SevEsAPJumpTable, IN UINTN WakeupBuffer)
Definition: MpLib.h:358
VOID EnableDebugAgent(VOID)
Definition: DxeMpLib.c:42
VOID SevSnpCreateSaveArea(IN CPU_MP_DATA *CpuMpData, IN CPU_AP_DATA *CpuData, UINT32 ApicId)
Definition: AmdSev.c:21
VOID SaveCpuMpData(IN CPU_MP_DATA *CpuMpData)
Definition: DxeMpLib.c:72
VOID(EFIAPI * EFI_AP_PROCEDURE)(IN OUT VOID *Buffer)
Definition: PiMultiPhase.h:191
volatile UINTN SPIN_LOCK
UINT64 EFI_PHYSICAL_ADDRESS
Definition: UefiBaseType.h:49
RETURN_STATUS EFI_STATUS
Definition: UefiBaseType.h:28
VOID * EFI_EVENT
Definition: UefiBaseType.h:36
Definition: Base.h:213