TianoCore EDK2 master
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#include <Uefi.h>
#include <Protocol/Smbios.h>
#include <IndustryStandard/ArmCache.h>
#include <IndustryStandard/ArmStdSmc.h>
#include <IndustryStandard/SmBios.h>
#include <Library/ArmLib.h>
#include <Library/ArmSmcLib.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/HiiLib.h>
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/OemMiscLib.h>
#include <Library/PcdLib.h>
#include <Library/PrintLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <Library/UefiLib.h>
#include "SmbiosProcessor.h"
Go to the source code of this file.
Macros | |
#define | CACHE_SOCKETED_SHIFT 3 |
#define | CACHE_LOCATION_SHIFT 5 |
#define | CACHE_ENABLED_SHIFT 7 |
#define | CACHE_OPERATION_MODE_SHIFT 8 |
#define | SET_HII_STRING_IF_PCD_NOT_EMPTY(Pcd, StringId) |
Enumerations | |
enum | CACHE_OPERATION_MODE { CacheModeWriteThrough = 0 , CacheModeWriteBack , CacheModeVariesWithAddress , CacheModeUnknown , CacheModeMax } |
enum | CACHE_LOCATION { CacheLocationInternal = 0 , CacheLocationExternal , CacheLocationReserved , CacheLocationUnknown , CacheLocationMax } |
Functions | |
UINT16 | GetCpuFrequency (IN UINT8 ProcessorNumber) |
UINTN | GetCacheSocketStr (IN UINT8 CacheLevel, IN BOOLEAN DataCache, IN BOOLEAN UnifiedCache, OUT CHAR16 *CacheSocketStr) |
VOID | ConfigureCacheArchitectureInformation (IN UINT8 CacheLevel, IN BOOLEAN DataCache, IN BOOLEAN UnifiedCache, OUT SMBIOS_TABLE_TYPE7 *Type7Record) |
SMBIOS_TABLE_TYPE7 * | AllocateAndInitCacheInformation (IN UINT8 CacheLevel, IN BOOLEAN DataCache, IN BOOLEAN UnifiedCache) |
VOID | AddSmbiosCacheTypeTable (IN UINTN ProcessorIndex, OUT EFI_SMBIOS_HANDLE *L1CacheHandle, OUT EFI_SMBIOS_HANDLE *L2CacheHandle, OUT EFI_SMBIOS_HANDLE *L3CacheHandle) |
EFI_STATUS | AllocateType4AndSetProcessorInformationStrings (SMBIOS_TABLE_TYPE4 **Type4Record, UINT8 ProcessorIndex, BOOLEAN Populated) |
EFI_STATUS | AddSmbiosProcessorTypeTable (IN UINTN ProcessorIndex) |
EFI_STATUS EFIAPI | ProcessorSubClassEntryPoint (IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable) |
Variables | |
UINT8 | ProcessorSubClassStrings [] |
EFI_HII_HANDLE | mHiiHandle |
EFI_SMBIOS_PROTOCOL * | mSmbios |
SMBIOS_TABLE_TYPE4 | mSmbiosProcessorTableTemplate |
Copyright (c) 2022, Ampere Computing LLC. All rights reserved. Copyright (c) 2021, NUVIA Inc. All rights reserved.
Copyright (c) 2015, Hisilicon Limited. All rights reserved. Copyright (c) 2015, Linaro Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file ProcessorSubClass.c.
#define CACHE_ENABLED_SHIFT 7 |
Definition at line 37 of file ProcessorSubClass.c.
#define CACHE_LOCATION_SHIFT 5 |
Definition at line 36 of file ProcessorSubClass.c.
#define CACHE_OPERATION_MODE_SHIFT 8 |
Definition at line 38 of file ProcessorSubClass.c.
#define CACHE_SOCKETED_SHIFT 3 |
Definition at line 35 of file ProcessorSubClass.c.
#define SET_HII_STRING_IF_PCD_NOT_EMPTY | ( | Pcd, | |
StringId | |||
) |
Sets the HII variable StringId
is Pcd
isn't empty.
Pcd | The FixedAtBuild PCD that contains the string to fetch. |
StringId | The string identifier to set. |
Definition at line 108 of file ProcessorSubClass.c.
enum CACHE_LOCATION |
Definition at line 48 of file ProcessorSubClass.c.
enum CACHE_OPERATION_MODE |
Enumerator | |
---|---|
CacheModeWriteThrough | Cache is write-through. |
CacheModeWriteBack | Cache is write-back. |
CacheModeVariesWithAddress | Cache mode varies by address. |
CacheModeUnknown | Cache mode is unknown. |
Definition at line 40 of file ProcessorSubClass.c.
VOID AddSmbiosCacheTypeTable | ( | IN UINTN | ProcessorIndex, |
OUT EFI_SMBIOS_HANDLE * | L1CacheHandle, | ||
OUT EFI_SMBIOS_HANDLE * | L2CacheHandle, | ||
OUT EFI_SMBIOS_HANDLE * | L3CacheHandle | ||
) |
Add Type 7 SMBIOS Record for Cache Information.
[in] | ProcessorIndex | Processor number of specified processor. |
[out] | L1CacheHandle | Pointer to the handle of the L1 Cache SMBIOS record. |
[out] | L2CacheHandle | Pointer to the handle of the L2 Cache SMBIOS record. |
[out] | L3CacheHandle | Pointer to the handle of the L3 Cache SMBIOS record. |
Definition at line 360 of file ProcessorSubClass.c.
EFI_STATUS AddSmbiosProcessorTypeTable | ( | IN UINTN | ProcessorIndex | ) |
Add Type 4 SMBIOS Record for Processor Information.
[in] | ProcessorIndex | Processor index of specified processor. |
Definition at line 646 of file ProcessorSubClass.c.
SMBIOS_TABLE_TYPE7 * AllocateAndInitCacheInformation | ( | IN UINT8 | CacheLevel, |
IN BOOLEAN | DataCache, | ||
IN BOOLEAN | UnifiedCache | ||
) |
Allocates and initializes an SMBIOS_TABLE_TYPE7 structure.
[in] | CacheLevel | The cache level (L1-L7). |
[in] | DataCache | Cache is a data cache. |
[in] | UnifiedCache | Cache is a unified cache. |
Definition at line 298 of file ProcessorSubClass.c.
EFI_STATUS AllocateType4AndSetProcessorInformationStrings | ( | SMBIOS_TABLE_TYPE4 ** | Type4Record, |
UINT8 | ProcessorIndex, | ||
BOOLEAN | Populated | ||
) |
Allocates a Type 4 Processor Information structure and sets the strings following the data fields.
[out] | Type4Record | The Type 4 structure to allocate and initialize |
[in] | ProcessorIndex | The index of the processor |
[in] | Populated | Whether the specified processor is populated. |
EFI_SUCCESS | The Type 4 structure was successfully allocated and the strings initialized. |
EFI_OUT_OF_RESOURCES | Could not allocate memory needed. |
Definition at line 472 of file ProcessorSubClass.c.
VOID ConfigureCacheArchitectureInformation | ( | IN UINT8 | CacheLevel, |
IN BOOLEAN | DataCache, | ||
IN BOOLEAN | UnifiedCache, | ||
OUT SMBIOS_TABLE_TYPE7 * | Type7Record | ||
) |
Fills in the Type 7 record with the cache architecture information read from the CPU registers.
[in] | CacheLevel | Cache level (e.g. L1, L2). |
[in] | DataCache | Cache is a data cache. |
[in] | UnifiedCache | Cache is a unified cache. |
[out] | Type7Record | The Type 7 record to fill in. |
Definition at line 188 of file ProcessorSubClass.c.
UINTN GetCacheSocketStr | ( | IN UINT8 | CacheLevel, |
IN BOOLEAN | DataCache, | ||
IN BOOLEAN | UnifiedCache, | ||
OUT CHAR16 * | CacheSocketStr | ||
) |
Gets a description of the specified cache.
[in] | CacheLevel | Zero-based cache level (e.g. L1 cache is 0). |
[in] | DataCache | Cache is a data cache. |
[in] | UnifiedCache | Cache is a unified cache. |
[out] | CacheSocketStr | The description of the specified cache |
Definition at line 143 of file ProcessorSubClass.c.
UINT16 GetCpuFrequency | ( | IN UINT8 | ProcessorNumber | ) |
Fetches the specified processor's frequency in Hz.
ProcessorNumber | The processor number |
Definition at line 125 of file ProcessorSubClass.c.
EFI_STATUS EFIAPI ProcessorSubClassEntryPoint | ( | IN EFI_HANDLE | ImageHandle, |
IN EFI_SYSTEM_TABLE * | SystemTable | ||
) |
Standard EFI driver point.
ImageHandle | Handle for the image of this driver |
SystemTable | Pointer to the EFI System Table |
EFI_SUCCESS | The data was successfully stored. |
Definition at line 766 of file ProcessorSubClass.c.
EFI_HII_HANDLE mHiiHandle |
Definition at line 56 of file ProcessorSubClass.c.
EFI_SMBIOS_PROTOCOL* mSmbios |
Definition at line 58 of file ProcessorSubClass.c.
SMBIOS_TABLE_TYPE4 mSmbiosProcessorTableTemplate |
Definition at line 60 of file ProcessorSubClass.c.