|
#define | PXE_BUSTYPE(a, b, c, d) |
|
#define | PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E') |
|
#define | PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R') |
|
#define | PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R') |
|
#define | PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R') |
|
#define | PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4') |
|
#define | PXE_SWAP_UINT16(n) ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8)) |
|
#define | PXE_SWAP_UINT32(n) |
|
#define | PXE_SWAP_UINT64(n) |
|
#define | PXE_CPBSIZE_NOT_USED 0 |
| zero
|
|
#define | PXE_DBSIZE_NOT_USED 0 |
| zero
|
|
#define | PXE_CPBADDR_NOT_USED (PXE_UINT64) 0 |
| zero
|
|
#define | PXE_DBADDR_NOT_USED (PXE_UINT64) 0 |
| zero
|
|
#define | PXE_CONST CONST |
|
#define | PXE_VOLATILE volatile |
|
#define | PXE_FALSE 0 |
| zero
|
|
#define | PXE_TRUE (!PXE_FALSE) |
|
#define | PXE_OPCODE_GET_STATE 0x0000 |
|
#define | PXE_OPCODE_START 0x0001 |
|
#define | PXE_OPCODE_STOP 0x0002 |
|
#define | PXE_OPCODE_GET_INIT_INFO 0x0003 |
|
#define | PXE_OPCODE_GET_CONFIG_INFO 0x0004 |
|
#define | PXE_OPCODE_INITIALIZE 0x0005 |
|
#define | PXE_OPCODE_RESET 0x0006 |
|
#define | PXE_OPCODE_SHUTDOWN 0x0007 |
|
#define | PXE_OPCODE_INTERRUPT_ENABLES 0x0008 |
|
#define | PXE_OPCODE_RECEIVE_FILTERS 0x0009 |
|
#define | PXE_OPCODE_STATION_ADDRESS 0x000A |
|
#define | PXE_OPCODE_STATISTICS 0x000B |
|
#define | PXE_OPCODE_MCAST_IP_TO_MAC 0x000C |
|
#define | PXE_OPCODE_NVDATA 0x000D |
|
#define | PXE_OPCODE_GET_STATUS 0x000E |
|
#define | PXE_OPCODE_FILL_HEADER 0x000F |
|
#define | PXE_OPCODE_TRANSMIT 0x0010 |
|
#define | PXE_OPCODE_RECEIVE 0x0011 |
|
#define | PXE_OPCODE_LAST_VALID 0x0011 |
|
#define | PXE_OPFLAGS_NOT_USED 0x0000 |
|
#define | PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK 0x0001 |
|
#define | PXE_OPFLAGS_INITIALIZE_DETECT_CABLE 0x0000 |
|
#define | PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE 0x0001 |
|
#define | PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS 0x0001 |
|
#define | PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002 |
|
#define | PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000 |
|
#define | PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000 |
|
#define | PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000 |
|
#define | PXE_OPFLAGS_INTERRUPT_READ 0x0000 |
|
#define | PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001 |
|
#define | PXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002 |
|
#define | PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004 |
|
#define | PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_OPMASK 0xC000 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_ENABLE 0x8000 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_DISABLE 0x4000 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_UNICAST 0x0001 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST 0x0002 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008 |
|
#define | PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010 |
|
#define | PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000 |
|
#define | PXE_OPFLAGS_STATION_ADDRESS_WRITE 0x0000 |
|
#define | PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001 |
|
#define | PXE_OPFLAGS_STATISTICS_READ 0x0000 |
|
#define | PXE_OPFLAGS_STATISTICS_RESET 0x0001 |
|
#define | PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK 0x0003 |
|
#define | PXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000 |
|
#define | PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001 |
|
#define | PXE_OPFLAGS_NVDATA_OPMASK 0x0001 |
|
#define | PXE_OPFLAGS_NVDATA_READ 0x0000 |
|
#define | PXE_OPFLAGS_NVDATA_WRITE 0x0001 |
|
#define | PXE_OPFLAGS_GET_INTERRUPT_STATUS 0x0001 |
|
#define | PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002 |
|
#define | PXE_OPFLAGS_GET_MEDIA_STATUS 0x0004 |
|
#define | PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001 |
|
#define | PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001 |
|
#define | PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000 |
|
#define | PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK 0x0001 |
|
#define | PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001 |
|
#define | PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000 |
|
#define | PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002 |
|
#define | PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002 |
|
#define | PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000 |
|
#define | PXE_STATFLAGS_INITIALIZE 0x0000 |
|
#define | PXE_STATFLAGS_STATUS_MASK 0xC000 |
|
#define | PXE_STATFLAGS_COMMAND_COMPLETE 0xC000 |
|
#define | PXE_STATFLAGS_COMMAND_FAILED 0x8000 |
|
#define | PXE_STATFLAGS_COMMAND_QUEUED 0x4000 |
|
#define | PXE_STATFLAGS_GET_STATE_MASK 0x0003 |
|
#define | PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002 |
|
#define | PXE_STATFLAGS_GET_STATE_STARTED 0x0001 |
|
#define | PXE_STATFLAGS_GET_STATE_STOPPED 0x0000 |
|
#define | PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001 |
|
#define | PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000 |
|
#define | PXE_STATFLAGS_CABLE_DETECT_SUPPORTED 0x0001 |
|
#define | PXE_STATFLAGS_GET_STATUS_NO_MEDIA_MASK 0x0002 |
|
#define | PXE_STATFLAGS_GET_STATUS_NO_MEDIA_NOT_SUPPORTED 0x0000 |
|
#define | PXE_STATFLAGS_GET_STATUS_NO_MEDIA_SUPPORTED 0x0002 |
|
#define | PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001 |
|
#define | PXE_STATFLAGS_RESET_NO_MEDIA 0x0001 |
|
#define | PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001 |
|
#define | PXE_STATFLAGS_INTERRUPT_TRANSMIT 0x0002 |
|
#define | PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004 |
|
#define | PXE_STATFLAGS_RECEIVE_FILTER_UNICAST 0x0001 |
|
#define | PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST 0x0002 |
|
#define | PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004 |
|
#define | PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008 |
|
#define | PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010 |
|
#define | PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F |
| / UNDI MCast IP to MAC. / / No additional StatFlags.
|
|
#define | PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000 |
|
#define | PXE_STATFLAGS_GET_STATUS_RECEIVE 0x0001 |
|
#define | PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002 |
|
#define | PXE_STATFLAGS_GET_STATUS_COMMAND 0x0004 |
|
#define | PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008 |
|
#define | PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY 0x0010 |
|
#define | PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN 0x0020 |
|
#define | PXE_STATFLAGS_GET_STATUS_NO_MEDIA 0x0040 |
|
#define | PXE_STATCODE_INITIALIZE 0x0000 |
|
#define | PXE_STATCODE_SUCCESS 0x0000 |
|
#define | PXE_STATCODE_INVALID_CDB 0x0001 |
|
#define | PXE_STATCODE_INVALID_CPB 0x0002 |
|
#define | PXE_STATCODE_BUSY 0x0003 |
|
#define | PXE_STATCODE_QUEUE_FULL 0x0004 |
|
#define | PXE_STATCODE_ALREADY_STARTED 0x0005 |
|
#define | PXE_STATCODE_NOT_STARTED 0x0006 |
|
#define | PXE_STATCODE_NOT_SHUTDOWN 0x0007 |
|
#define | PXE_STATCODE_ALREADY_INITIALIZED 0x0008 |
|
#define | PXE_STATCODE_NOT_INITIALIZED 0x0009 |
|
#define | PXE_STATCODE_DEVICE_FAILURE 0x000A |
|
#define | PXE_STATCODE_NVDATA_FAILURE 0x000B |
|
#define | PXE_STATCODE_UNSUPPORTED 0x000C |
|
#define | PXE_STATCODE_BUFFER_FULL 0x000D |
|
#define | PXE_STATCODE_INVALID_PARAMETER 0x000E |
|
#define | PXE_STATCODE_INVALID_UNDI 0x000F |
|
#define | PXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010 |
|
#define | PXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011 |
|
#define | PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012 |
|
#define | PXE_STATCODE_NO_DATA 0x0013 |
|
#define | PXE_IFNUM_START 0x0000 |
|
#define | PXE_IFNUM_INVALID 0x0000 |
|
#define | PXE_CONTROL_QUEUE_IF_BUSY 0x0002 |
|
#define | PXE_CONTROL_LINK 0x0001 |
|
#define | PXE_CONTROL_LAST_CDB_IN_LIST 0x0000 |
|
#define | PXE_FRAME_TYPE_NONE 0x00 |
|
#define | PXE_FRAME_TYPE_UNICAST 0x01 |
|
#define | PXE_FRAME_TYPE_BROADCAST 0x02 |
|
#define | PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03 |
|
#define | PXE_FRAME_TYPE_PROMISCUOUS 0x04 |
|
#define | PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05 |
|
#define | PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST |
|
#define | PXE_MAC_LENGTH 32 |
|
#define | PXE_IFTYPE_ETHERNET 0x01 |
|
#define | PXE_IFTYPE_TOKENRING 0x04 |
|
#define | PXE_IFTYPE_FIBRE_CHANNEL 0x12 |
|
#define | PXE_HWSTAT_STATE_MASK 0xC0000000 |
|
#define | PXE_HWSTAT_BUSY 0xC0000000 |
|
#define | PXE_HWSTAT_INITIALIZED 0x80000000 |
|
#define | PXE_HWSTAT_STARTED 0x40000000 |
|
#define | PXE_HWSTAT_STOPPED 0x00000000 |
|
#define | PXE_HWSTAT_COMMAND_FAILED 0x20000000 |
|
#define | PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000 |
|
#define | PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800 |
|
#define | PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400 |
|
#define | PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200 |
|
#define | PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100 |
|
#define | PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080 |
|
#define | PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040 |
|
#define | PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020 |
|
#define | PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010 |
|
#define | PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008 |
|
#define | PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004 |
|
#define | PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002 |
|
#define | PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001 |
|
#define | PXE_HWCMD_ISSUE_COMMAND 0x80000000 |
|
#define | PXE_HWCMD_INTS_AND_FILTS 0x00000000 |
|
#define | PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000 |
|
#define | PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800 |
|
#define | PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400 |
|
#define | PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200 |
|
#define | PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100 |
|
#define | PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080 |
|
#define | PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040 |
|
#define | PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020 |
|
#define | PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010 |
|
#define | PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008 |
|
#define | PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004 |
|
#define | PXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002 |
|
#define | PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001 |
|
#define | PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E') |
|
#define | PXE_ROMID_REV 0x02 |
|
#define | PXE_ROMID_MAJORVER 0x03 |
|
#define | PXE_ROMID_MINORVER 0x01 |
|
#define | PXE_ROMID_IMP_HW_UNDI 0x80000000 |
|
#define | PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000 |
|
#define | PXE_ROMID_IMP_64BIT_DEVICE 0x00010000 |
|
#define | PXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000 |
|
#define | PXE_ROMID_IMP_CMD_LINK_SUPPORTED 0x00004000 |
|
#define | PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED 0x00002000 |
|
#define | PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED 0x00001000 |
|
#define | PXE_ROMID_IMP_NVDATA_SUPPORT_MASK 0x00000C00 |
|
#define | PXE_ROMID_IMP_NVDATA_BULK_WRITABLE 0x00000C00 |
|
#define | PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE 0x00000800 |
|
#define | PXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400 |
|
#define | PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE 0x00000000 |
|
#define | PXE_ROMID_IMP_STATISTICS_SUPPORTED 0x00000200 |
|
#define | PXE_ROMID_IMP_STATION_ADDR_SETTABLE 0x00000100 |
|
#define | PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED 0x00000080 |
|
#define | PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED 0x00000040 |
|
#define | PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED 0x00000020 |
|
#define | PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED 0x00000010 |
|
#define | PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED 0x00000008 |
|
#define | PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED 0x00000004 |
|
#define | PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED 0x00000002 |
|
#define | PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001 |
|
#define | MAX_PCI_CONFIG_LEN 64 |
|
#define | MAX_EEPROM_LEN 128 |
|
#define | MAX_XMIT_BUFFERS 32 |
| recycling Q length for xmit_done.
|
|
#define | MAX_MCAST_ADDRESS_CNT 8 |
|
#define | TO_AND_FROM_DEVICE 0 |
|
#define | FROM_DEVICE 1 |
|
#define | TO_DEVICE 2 |
|
#define | PXE_DELAY_MILLISECOND 1000 |
|
#define | PXE_DELAY_SECOND 1000000 |
|
#define | PXE_IO_READ 0 |
|
#define | PXE_IO_WRITE 1 |
|
#define | PXE_MEM_READ 2 |
|
#define | PXE_MEM_WRITE 4 |
|
#define | PXE_MAX_TXRX_UNIT_ETHER 1500 |
|
#define | PXE_HWADDR_LEN_ETHER 0x0006 |
|
#define | PXE_MAC_HEADER_LEN_ETHER 0x000E |
|
#define | PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1 |
|
#define | PXE_DUPLEX_FORCE_FULL_SUPPORTED 2 |
|
#define | PXE_LOOPBACK_INTERNAL_SUPPORTED 1 |
|
#define | PXE_LOOPBACK_EXTERNAL_SUPPORTED 2 |
|
#define | PXE_DUPLEX_DEFAULT 0x00 |
|
#define | PXE_FORCE_FULL_DUPLEX 0x01 |
|
#define | PXE_ENABLE_FULL_DUPLEX 0x02 |
|
#define | PXE_FORCE_HALF_DUPLEX 0x04 |
|
#define | PXE_DISABLE_FULL_DUPLEX 0x08 |
|
#define | LOOPBACK_NORMAL 0 |
|
#define | LOOPBACK_INTERNAL 1 |
|
#define | LOOPBACK_EXTERNAL 2 |
|
#define | PXE_STATISTICS_RX_TOTAL_FRAMES 0x00 |
|
#define | PXE_STATISTICS_RX_GOOD_FRAMES 0x01 |
|
#define | PXE_STATISTICS_RX_UNDERSIZE_FRAMES 0x02 |
|
#define | PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03 |
|
#define | PXE_STATISTICS_RX_DROPPED_FRAMES 0x04 |
|
#define | PXE_STATISTICS_RX_UNICAST_FRAMES 0x05 |
|
#define | PXE_STATISTICS_RX_BROADCAST_FRAMES 0x06 |
|
#define | PXE_STATISTICS_RX_MULTICAST_FRAMES 0x07 |
|
#define | PXE_STATISTICS_RX_CRC_ERROR_FRAMES 0x08 |
|
#define | PXE_STATISTICS_RX_TOTAL_BYTES 0x09 |
|
#define | PXE_STATISTICS_TX_TOTAL_FRAMES 0x0A |
|
#define | PXE_STATISTICS_TX_GOOD_FRAMES 0x0B |
|
#define | PXE_STATISTICS_TX_UNDERSIZE_FRAMES 0x0C |
|
#define | PXE_STATISTICS_TX_OVERSIZE_FRAMES 0x0D |
|
#define | PXE_STATISTICS_TX_DROPPED_FRAMES 0x0E |
|
#define | PXE_STATISTICS_TX_UNICAST_FRAMES 0x0F |
|
#define | PXE_STATISTICS_TX_BROADCAST_FRAMES 0x10 |
|
#define | PXE_STATISTICS_TX_MULTICAST_FRAMES 0x11 |
|
#define | PXE_STATISTICS_TX_CRC_ERROR_FRAMES 0x12 |
|
#define | PXE_STATISTICS_TX_TOTAL_BYTES 0x13 |
|
#define | PXE_STATISTICS_COLLISIONS 0x14 |
|
#define | PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15 |
|
#define | PXE_STATISTICS_RX_DUPLICATED_FRAMES 0x16 |
|
#define | PXE_STATISTICS_RX_DECRYPT_ERROR_FRAMES 0x17 |
|
#define | PXE_STATISTICS_TX_ERROR_FRAMES 0x18 |
|
#define | PXE_STATISTICS_TX_RETRY_FRAMES 0x19 |
|
#define | PXE_PROTOCOL_ETHERNET_IP 0x0800 |
|
#define | PXE_PROTOCOL_ETHERNET_ARP 0x0806 |
|
#define | MAX_XMIT_FRAGMENTS 16 |
|
This header file contains all of the PXE type definitions, structure prototypes, global variables and constants that are needed for porting PXE to EFI.
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
- Revision Reference:
- 32/64-bit PXE specification: alpha-4, 99-Dec-17.
Definition in file UefiPxe.h.