136 if ((RegEdx & BIT19) == 0) {
144 CacheLineSize = (RegEbx & 0xff00) >> 5;
146 Start = (
UINTN)Address;
150 End = (Start + Length + (CacheLineSize - 1)) & ~(CacheLineSize - 1);
151 Start &= ~((
UINTN)CacheLineSize - 1);
155 }
while (Start != End);
VOID *EFIAPI AsmFlushCacheLine(IN VOID *LinearAddress)
VOID EFIAPI AsmInvd(VOID)
VOID EFIAPI AsmWbinvd(VOID)
UINT32 EFIAPI AsmCpuid(IN UINT32 Index, OUT UINT32 *RegisterEax OPTIONAL, OUT UINT32 *RegisterEbx OPTIONAL, OUT UINT32 *RegisterEcx OPTIONAL, OUT UINT32 *RegisterEdx OPTIONAL)
VOID EFIAPI InvalidateDataCache(VOID)
VOID *EFIAPI WriteBackDataCacheRange(IN VOID *Address, IN UINTN Length)
VOID *EFIAPI InvalidateDataCacheRange(IN VOID *Address, IN UINTN Length)
VOID *EFIAPI WriteBackInvalidateDataCacheRange(IN VOID *Address, IN UINTN Length)
VOID EFIAPI InvalidateInstructionCache(VOID)
VOID EFIAPI WriteBackInvalidateDataCache(VOID)
VOID EFIAPI WriteBackDataCache(VOID)
VOID *EFIAPI InvalidateInstructionCacheRange(IN VOID *Address, IN UINTN Length)