TianoCore EDK2 master
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#include <Uefi/UefiBaseType.h>
Go to the source code of this file.
Data Structures | |
union | CSSELR_DATA |
Defines the structure of the CSSELR (Cache Size Selection) register. More... | |
union | CCSIDR_DATA |
Defines the structure of the CCSIDR (Current Cache Size ID) register. More... | |
union | CCSIDR2_DATA |
Defines the structure of the AARCH32 CCSIDR2 register. More... | |
union | CLIDR_DATA |
Macros | |
#define | MAX_ARM_CACHE_LEVEL 7 |
#define | CLIDR_GET_CACHE_TYPE(x, level) ((x >> (3 * (level))) & 0b111) |
Enumerations | |
enum | CSSELR_CACHE_TYPE { CsselrCacheTypeDataOrUnified = 0 , CsselrCacheTypeInstruction , CsselrCacheTypeMax } |
The cache type values for the InD field of the CSSELR register. More... | |
enum | CLIDR_CACHE_TYPE { ClidrCacheTypeNone = 0 , ClidrCacheTypeInstructionOnly , ClidrCacheTypeDataOnly , ClidrCacheTypeSeparate , ClidrCacheTypeUnified , ClidrCacheTypeMax } |
The cache types reported in the CLIDR register. More... | |
Copyright (c) 2020 - 2021, NUVIA Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file ArmCache.h.
#define CLIDR_GET_CACHE_TYPE | ( | x, | |
level | |||
) | ((x >> (3 * (level))) & 0b111) |
Definition at line 109 of file ArmCache.h.
#define MAX_ARM_CACHE_LEVEL 7 |
Definition at line 16 of file ArmCache.h.
enum CLIDR_CACHE_TYPE |
The cache types reported in the CLIDR register.
Definition at line 95 of file ArmCache.h.
enum CSSELR_CACHE_TYPE |
The cache type values for the InD field of the CSSELR register.
Enumerator | |
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CsselrCacheTypeDataOrUnified | Select the data or unified cache. |
CsselrCacheTypeInstruction | Select the instruction cache. |
Definition at line 30 of file ArmCache.h.