- x -

• x2APIC : CPUID_VERSION_INFO_ECX
• X509ConstructCertificateStackV : _EDKII_CRYPTO_PROTOCOL
• X509GetSubjectName : _EDKII_CRYPTO_PROTOCOL
• X509GetVersion : _EDKII_CRYPTO_PROTOCOL
• x87 : CPUID_EXTENDED_STATE_MAIN_LEAF_EAX
• XCR0 : CPUID_EXTENDED_STATE_SUB_LEAF_ECX
• XCR0_1 : CPUID_EXTENDED_STATE_SUB_LEAF_ECX
• XD : MSR_ATOM_IA32_MISC_ENABLE_REGISTER, MSR_CORE2_IA32_MISC_ENABLE_REGISTER, MSR_CORE_IA32_MISC_ENABLE_REGISTER, MSR_GOLDMONT_IA32_MISC_ENABLE_REGISTER, MSR_IA32_MISC_ENABLE_REGISTER, MSR_NEHALEM_IA32_MISC_ENABLE_REGISTER, MSR_PENTIUM_4_IA32_MISC_ENABLE_REGISTER, MSR_SANDY_BRIDGE_IA32_MISC_ENABLE_REGISTER, MSR_SILVERMONT_IA32_MISC_ENABLE_REGISTER, MSR_XEON_PHI_IA32_MISC_ENABLE_REGISTER
• XDataFifo : PTP_FIFO_REGISTERS
• XenStore : XENSTORE_PRIVATE
• XEOperation : MSR_CORE2_PERF_STATUS_REGISTER
• XGETBV : CPUID_EXTENDED_STATE_SUB_LEAF_EAX
• XGpe0Blk : CmX64FadtXgpeBlockInfo
• XOP : CPUID_AMD_EXTENDED_CPU_SIG_ECX
• XPm1aEvtBlk : CmX64FadtXpmBlockInfo
• XSAVE : CPUID_VERSION_INFO_ECX
• XSAVEC : CPUID_EXTENDED_STATE_SUB_LEAF_EAX
• XSaveErPtr : CPUID_AMD_VIR_PHY_ADDRESS_SIZE_EBX
• XSAVEOPT : CPUID_EXTENDED_STATE_SUB_LEAF_EAX
• XSAVES : CPUID_EXTENDED_STATE_SUB_LEAF_EAX
• XSS : CPUID_EXTENDED_STATE_SIZE_OFFSET_ECX
• XStatePolicy : STM_SMM_STATE
• xTPR_Message_Disable : MSR_ATOM_IA32_MISC_ENABLE_REGISTER, MSR_CORE2_IA32_MISC_ENABLE_REGISTER, MSR_GOLDMONT_IA32_MISC_ENABLE_REGISTER, MSR_IA32_MISC_ENABLE_REGISTER, MSR_NEHALEM_IA32_MISC_ENABLE_REGISTER, MSR_PENTIUM_4_IA32_MISC_ENABLE_REGISTER, MSR_PENTIUM_M_IA32_MISC_ENABLE_REGISTER, MSR_SANDY_BRIDGE_IA32_MISC_ENABLE_REGISTER, MSR_SILVERMONT_IA32_MISC_ENABLE_REGISTER, MSR_XEON_PHI_IA32_MISC_ENABLE_REGISTER
• xTPR_Update_Control : CPUID_VERSION_INFO_ECX