SandyBridgeMsr.h File Reference

#include <Register/Intel/ArchitecturalMsr.h>

Go to the source code of this file.

Data Structures
union	MSR_SANDY_BRIDGE_SMI_COUNT_REGISTER
union	MSR_SANDY_BRIDGE_PLATFORM_INFO_REGISTER
union	MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL_REGISTER
union	MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE_REGISTER
union	MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER
union	MSR_SANDY_BRIDGE_PERF_STATUS_REGISTER
union	MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER
union	MSR_SANDY_BRIDGE_IA32_MISC_ENABLE_REGISTER
union	MSR_SANDY_BRIDGE_TEMPERATURE_TARGET_REGISTER
union	MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL_REGISTER
union	MSR_SANDY_BRIDGE_LBR_SELECT_REGISTER
union	MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER
union	MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL_REGISTER
union	MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL_REGISTER
union	MSR_SANDY_BRIDGE_PEBS_ENABLE_REGISTER
union	MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER
union	MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER
union	MSR_SANDY_BRIDGE_PKGC3_IRTL_REGISTER
union	MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER
union	MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT_REGISTER
union	MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL_REGISTER
union	MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS_REGISTER
union	MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL_REGISTER
union	MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR_REGISTER
union	MSR_SANDY_BRIDGE_UNC_CBO_CONFIG_REGISTER
union	MSR_SANDY_BRIDGE_PKGC7_IRTL_REGISTER
union	MSR_SANDY_BRIDGE_ERROR_CONTROL_REGISTER
union	MSR_SANDY_BRIDGE_PEBS_NUM_ALT_REGISTER

Macros
#define	IS_SANDY_BRIDGE_PROCESSOR(DisplayFamily, DisplayModel)
#define	MSR_SANDY_BRIDGE_SMI_COUNT   0x00000034
#define	MSR_SANDY_BRIDGE_PLATFORM_INFO   0x000000CE
#define	MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL   0x000000E2
#define	MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE   0x000000E4
#define	MSR_SANDY_BRIDGE_FEATURE_CONFIG   0x0000013C
#define	MSR_SANDY_BRIDGE_PERF_STATUS   0x00000198
#define	MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION   0x0000019A
#define	MSR_SANDY_BRIDGE_IA32_MISC_ENABLE   0x000001A0
#define	MSR_SANDY_BRIDGE_TEMPERATURE_TARGET   0x000001A2
#define	MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL   0x000001A4
#define	MSR_SANDY_BRIDGE_OFFCORE_RSP_0   0x000001A6
#define	MSR_SANDY_BRIDGE_OFFCORE_RSP_1   0x000001A7
#define	MSR_SANDY_BRIDGE_MISC_PWR_MGMT   0x000001AA
#define	MSR_SANDY_BRIDGE_LBR_SELECT   0x000001C8
#define	MSR_SANDY_BRIDGE_LASTBRANCH_TOS   0x000001C9
#define	MSR_SANDY_BRIDGE_LER_FROM_LIP   0x000001DD
#define	MSR_SANDY_BRIDGE_LER_TO_LIP   0x000001DE
#define	MSR_SANDY_BRIDGE_POWER_CTL   0x000001FC
#define	MSR_SANDY_BRIDGE_IA32_MC4_CTL2   0x00000284
#define	MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS   0x0000038E
#define	MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL   0x0000038F
#define	MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL   0x00000390
#define	MSR_SANDY_BRIDGE_PEBS_ENABLE   0x000003F1
#define	MSR_SANDY_BRIDGE_PEBS_LD_LAT   0x000003F6
#define	MSR_SANDY_BRIDGE_PKG_C3_RESIDENCY   0x000003F8
#define	MSR_SANDY_BRIDGE_PKG_C6_RESIDENCY   0x000003F9
#define	MSR_SANDY_BRIDGE_PKG_C7_RESIDENCY   0x000003FA
#define	MSR_SANDY_BRIDGE_CORE_C3_RESIDENCY   0x000003FC
#define	MSR_SANDY_BRIDGE_CORE_C6_RESIDENCY   0x000003FD
#define	MSR_SANDY_BRIDGE_CORE_C7_RESIDENCY   0x000003FE
#define	MSR_SANDY_BRIDGE_IA32_MC4_CTL   0x00000410
#define	MSR_SANDY_BRIDGE_IA32_VMX_EPT_VPID_ENUM   0x0000048C
#define	MSR_SANDY_BRIDGE_RAPL_POWER_UNIT   0x00000606
#define	MSR_SANDY_BRIDGE_PKGC3_IRTL   0x0000060A
#define	MSR_SANDY_BRIDGE_PKGC6_IRTL   0x0000060B
#define	MSR_SANDY_BRIDGE_PKG_C2_RESIDENCY   0x0000060D
#define	MSR_SANDY_BRIDGE_PKG_POWER_LIMIT   0x00000610
#define	MSR_SANDY_BRIDGE_PKG_ENERGY_STATUS   0x00000611
#define	MSR_SANDY_BRIDGE_PKG_POWER_INFO   0x00000614
#define	MSR_SANDY_BRIDGE_PP0_POWER_LIMIT   0x00000638
#define	MSR_SANDY_BRIDGE_PP0_ENERGY_STATUS   0x00000639
#define	MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT   0x000001AD
#define	MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL   0x00000391
#define	MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS   0x00000392
#define	MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL   0x00000394
#define	MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR   0x00000395
#define	MSR_SANDY_BRIDGE_UNC_CBO_CONFIG   0x00000396
#define	MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR0   0x000003B0
#define	MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR1   0x000003B1
#define	MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL0   0x000003B2
#define	MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL1   0x000003B3
#define	MSR_SANDY_BRIDGE_PKGC7_IRTL   0x0000060C
#define	MSR_SANDY_BRIDGE_PP0_POLICY   0x0000063A
#define	MSR_SANDY_BRIDGE_PP1_POWER_LIMIT   0x00000640
#define	MSR_SANDY_BRIDGE_PP1_ENERGY_STATUS   0x00000641
#define	MSR_SANDY_BRIDGE_PP1_POLICY   0x00000642
#define	MSR_SANDY_BRIDGE_ERROR_CONTROL   0x0000017F
#define	MSR_SANDY_BRIDGE_PEBS_NUM_ALT   0x0000039C
#define	MSR_SANDY_BRIDGE_PKG_PERF_STATUS   0x00000613
#define	MSR_SANDY_BRIDGE_DRAM_POWER_LIMIT   0x00000618
#define	MSR_SANDY_BRIDGE_DRAM_ENERGY_STATUS   0x00000619
#define	MSR_SANDY_BRIDGE_DRAM_PERF_STATUS   0x0000061B
#define	MSR_SANDY_BRIDGE_DRAM_POWER_INFO   0x0000061C
#define	MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTL   0x00000C08
#define	MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTR   0x00000C09
#define	MSR_SANDY_BRIDGE_U_PMON_EVNTSEL0   0x00000C10
#define	MSR_SANDY_BRIDGE_U_PMON_EVNTSEL1   0x00000C11
#define	MSR_SANDY_BRIDGE_U_PMON_CTR0   0x00000C16
#define	MSR_SANDY_BRIDGE_U_PMON_CTR1   0x00000C17
#define	MSR_SANDY_BRIDGE_PCU_PMON_BOX_CTL   0x00000C24
#define	MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL0   0x00000C30
#define	MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL1   0x00000C31
#define	MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL2   0x00000C32
#define	MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL3   0x00000C33
#define	MSR_SANDY_BRIDGE_PCU_PMON_BOX_FILTER   0x00000C34
#define	MSR_SANDY_BRIDGE_PCU_PMON_CTR0   0x00000C36
#define	MSR_SANDY_BRIDGE_PCU_PMON_CTR1   0x00000C37
#define	MSR_SANDY_BRIDGE_PCU_PMON_CTR2   0x00000C38
#define	MSR_SANDY_BRIDGE_PCU_PMON_CTR3   0x00000C39
#define	MSR_SANDY_BRIDGE_C0_PMON_BOX_CTL   0x00000D04
#define	MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL0   0x00000D10
#define	MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL1   0x00000D11
#define	MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL2   0x00000D12
#define	MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL3   0x00000D13
#define	MSR_SANDY_BRIDGE_C0_PMON_BOX_FILTER   0x00000D14
#define	MSR_SANDY_BRIDGE_C0_PMON_CTR0   0x00000D16
#define	MSR_SANDY_BRIDGE_C0_PMON_CTR1   0x00000D17
#define	MSR_SANDY_BRIDGE_C0_PMON_CTR2   0x00000D18
#define	MSR_SANDY_BRIDGE_C0_PMON_CTR3   0x00000D19
#define	MSR_SANDY_BRIDGE_C1_PMON_BOX_CTL   0x00000D24
#define	MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL0   0x00000D30
#define	MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL1   0x00000D31
#define	MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL2   0x00000D32
#define	MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL3   0x00000D33
#define	MSR_SANDY_BRIDGE_C1_PMON_BOX_FILTER   0x00000D34
#define	MSR_SANDY_BRIDGE_C1_PMON_CTR0   0x00000D36
#define	MSR_SANDY_BRIDGE_C1_PMON_CTR1   0x00000D37
#define	MSR_SANDY_BRIDGE_C1_PMON_CTR2   0x00000D38
#define	MSR_SANDY_BRIDGE_C1_PMON_CTR3   0x00000D39
#define	MSR_SANDY_BRIDGE_C2_PMON_BOX_CTL   0x00000D44
#define	MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL0   0x00000D50
#define	MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL1   0x00000D51
#define	MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL2   0x00000D52
#define	MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL3   0x00000D53
#define	MSR_SANDY_BRIDGE_C2_PMON_BOX_FILTER   0x00000D54
#define	MSR_SANDY_BRIDGE_C2_PMON_CTR0   0x00000D56
#define	MSR_SANDY_BRIDGE_C2_PMON_CTR1   0x00000D57
#define	MSR_SANDY_BRIDGE_C2_PMON_CTR2   0x00000D58
#define	MSR_SANDY_BRIDGE_C2_PMON_CTR3   0x00000D59
#define	MSR_SANDY_BRIDGE_C3_PMON_BOX_CTL   0x00000D64
#define	MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL0   0x00000D70
#define	MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL1   0x00000D71
#define	MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL2   0x00000D72
#define	MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL3   0x00000D73
#define	MSR_SANDY_BRIDGE_C3_PMON_BOX_FILTER   0x00000D74
#define	MSR_SANDY_BRIDGE_C3_PMON_CTR0   0x00000D76
#define	MSR_SANDY_BRIDGE_C3_PMON_CTR1   0x00000D77
#define	MSR_SANDY_BRIDGE_C3_PMON_CTR2   0x00000D78
#define	MSR_SANDY_BRIDGE_C3_PMON_CTR3   0x00000D79
#define	MSR_SANDY_BRIDGE_C4_PMON_BOX_CTL   0x00000D84
#define	MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL0   0x00000D90
#define	MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL1   0x00000D91
#define	MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL2   0x00000D92
#define	MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL3   0x00000D93
#define	MSR_SANDY_BRIDGE_C4_PMON_BOX_FILTER   0x00000D94
#define	MSR_SANDY_BRIDGE_C4_PMON_CTR0   0x00000D96
#define	MSR_SANDY_BRIDGE_C4_PMON_CTR1   0x00000D97
#define	MSR_SANDY_BRIDGE_C4_PMON_CTR2   0x00000D98
#define	MSR_SANDY_BRIDGE_C4_PMON_CTR3   0x00000D99
#define	MSR_SANDY_BRIDGE_C5_PMON_BOX_CTL   0x00000DA4
#define	MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL0   0x00000DB0
#define	MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL1   0x00000DB1
#define	MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL2   0x00000DB2
#define	MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL3   0x00000DB3
#define	MSR_SANDY_BRIDGE_C5_PMON_BOX_FILTER   0x00000DB4
#define	MSR_SANDY_BRIDGE_C5_PMON_CTR0   0x00000DB6
#define	MSR_SANDY_BRIDGE_C5_PMON_CTR1   0x00000DB7
#define	MSR_SANDY_BRIDGE_C5_PMON_CTR2   0x00000DB8
#define	MSR_SANDY_BRIDGE_C5_PMON_CTR3   0x00000DB9
#define	MSR_SANDY_BRIDGE_C6_PMON_BOX_CTL   0x00000DC4
#define	MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL0   0x00000DD0
#define	MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL1   0x00000DD1
#define	MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL2   0x00000DD2
#define	MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL3   0x00000DD3
#define	MSR_SANDY_BRIDGE_C6_PMON_BOX_FILTER   0x00000DD4
#define	MSR_SANDY_BRIDGE_C6_PMON_CTR0   0x00000DD6
#define	MSR_SANDY_BRIDGE_C6_PMON_CTR1   0x00000DD7
#define	MSR_SANDY_BRIDGE_C6_PMON_CTR2   0x00000DD8
#define	MSR_SANDY_BRIDGE_C6_PMON_CTR3   0x00000DD9
#define	MSR_SANDY_BRIDGE_C7_PMON_BOX_CTL   0x00000DE4
#define	MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL0   0x00000DF0
#define	MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL1   0x00000DF1
#define	MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL2   0x00000DF2
#define	MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL3   0x00000DF3
#define	MSR_SANDY_BRIDGE_C7_PMON_BOX_FILTER   0x00000DF4
#define	MSR_SANDY_BRIDGE_C7_PMON_CTR0   0x00000DF6
#define	MSR_SANDY_BRIDGE_C7_PMON_CTR1   0x00000DF7
#define	MSR_SANDY_BRIDGE_C7_PMON_CTR2   0x00000DF8
#define	MSR_SANDY_BRIDGE_C7_PMON_CTR3   0x00000DF9
#define	MSR_SANDY_BRIDGE_IA32_PERFEVTSEL4   0x0000018A
#define	MSR_SANDY_BRIDGE_IA32_PERFEVTSEL5   0x0000018B
#define	MSR_SANDY_BRIDGE_IA32_PERFEVTSEL6   0x0000018C
#define	MSR_SANDY_BRIDGE_IA32_PERFEVTSEL7   0x0000018D
#define	MSR_SANDY_BRIDGE_LASTBRANCH_0_FROM_IP   0x00000680
#define	MSR_SANDY_BRIDGE_LASTBRANCH_1_FROM_IP   0x00000681
#define	MSR_SANDY_BRIDGE_LASTBRANCH_2_FROM_IP   0x00000682
#define	MSR_SANDY_BRIDGE_LASTBRANCH_3_FROM_IP   0x00000683
#define	MSR_SANDY_BRIDGE_LASTBRANCH_4_FROM_IP   0x00000684
#define	MSR_SANDY_BRIDGE_LASTBRANCH_5_FROM_IP   0x00000685
#define	MSR_SANDY_BRIDGE_LASTBRANCH_6_FROM_IP   0x00000686
#define	MSR_SANDY_BRIDGE_LASTBRANCH_7_FROM_IP   0x00000687
#define	MSR_SANDY_BRIDGE_LASTBRANCH_8_FROM_IP   0x00000688
#define	MSR_SANDY_BRIDGE_LASTBRANCH_9_FROM_IP   0x00000689
#define	MSR_SANDY_BRIDGE_LASTBRANCH_10_FROM_IP   0x0000068A
#define	MSR_SANDY_BRIDGE_LASTBRANCH_11_FROM_IP   0x0000068B
#define	MSR_SANDY_BRIDGE_LASTBRANCH_12_FROM_IP   0x0000068C
#define	MSR_SANDY_BRIDGE_LASTBRANCH_13_FROM_IP   0x0000068D
#define	MSR_SANDY_BRIDGE_LASTBRANCH_14_FROM_IP   0x0000068E
#define	MSR_SANDY_BRIDGE_LASTBRANCH_15_FROM_IP   0x0000068F
#define	MSR_SANDY_BRIDGE_LASTBRANCH_0_TO_IP   0x000006C0
#define	MSR_SANDY_BRIDGE_LASTBRANCH_1_TO_IP   0x000006C1
#define	MSR_SANDY_BRIDGE_LASTBRANCH_2_TO_IP   0x000006C2
#define	MSR_SANDY_BRIDGE_LASTBRANCH_3_TO_IP   0x000006C3
#define	MSR_SANDY_BRIDGE_LASTBRANCH_4_TO_IP   0x000006C4
#define	MSR_SANDY_BRIDGE_LASTBRANCH_5_TO_IP   0x000006C5
#define	MSR_SANDY_BRIDGE_LASTBRANCH_6_TO_IP   0x000006C6
#define	MSR_SANDY_BRIDGE_LASTBRANCH_7_TO_IP   0x000006C7
#define	MSR_SANDY_BRIDGE_LASTBRANCH_8_TO_IP   0x000006C8
#define	MSR_SANDY_BRIDGE_LASTBRANCH_9_TO_IP   0x000006C9
#define	MSR_SANDY_BRIDGE_LASTBRANCH_10_TO_IP   0x000006CA
#define	MSR_SANDY_BRIDGE_LASTBRANCH_11_TO_IP   0x000006CB
#define	MSR_SANDY_BRIDGE_LASTBRANCH_12_TO_IP   0x000006CC
#define	MSR_SANDY_BRIDGE_LASTBRANCH_13_TO_IP   0x000006CD
#define	MSR_SANDY_BRIDGE_LASTBRANCH_14_TO_IP   0x000006CE
#define	MSR_SANDY_BRIDGE_LASTBRANCH_15_TO_IP   0x000006CF
#define	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL0   0x00000700
#define	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL1   0x00000701
#define	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL2   0x00000702
#define	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL3   0x00000703
#define	MSR_SANDY_BRIDGE_UNC_CBO_0_UNIT_STATUS   0x00000705
#define	MSR_SANDY_BRIDGE_UNC_CBO_1_UNIT_STATUS   0x00000715
#define	MSR_SANDY_BRIDGE_UNC_CBO_2_UNIT_STATUS   0x00000725
#define	MSR_SANDY_BRIDGE_UNC_CBO_3_UNIT_STATUS   0x00000735
#define	MSR_SANDY_BRIDGE_UNC_CBO_4_UNIT_STATUS   0x00000745
#define	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR0   0x00000706
#define	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR1   0x00000707
#define	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR2   0x00000708
#define	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR3   0x00000709
#define	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL0   0x00000710
#define	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL1   0x00000711
#define	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL2   0x00000712
#define	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL3   0x00000713
#define	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR0   0x00000716
#define	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR1   0x00000717
#define	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR2   0x00000718
#define	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR3   0x00000719
#define	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL0   0x00000720
#define	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL1   0x00000721
#define	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL2   0x00000722
#define	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL3   0x00000723
#define	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR0   0x00000726
#define	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR1   0x00000727
#define	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR2   0x00000728
#define	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR3   0x00000729
#define	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL0   0x00000730
#define	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL1   0x00000731
#define	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL2   0x00000732
#define	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL3   0x00000733
#define	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR0   0x00000736
#define	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR1   0x00000737
#define	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR2   0x00000738
#define	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR3   0x00000739
#define	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL0   0x00000740
#define	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL1   0x00000741
#define	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL2   0x00000742
#define	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL3   0x00000743
#define	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR0   0x00000746
#define	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR1   0x00000747
#define	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR2   0x00000748
#define	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR3   0x00000749

Detailed Description

MSR Definitions for Intel processors based on the Sandy Bridge microarchitecture.

Provides defines for Machine Specific Registers(MSR) indexes. Data structures are provided for MSRs that contain one or more bit fields. If the MSR value returned is a single 32-bit or 64-bit value, then a data structure is not provided for that MSR.

Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Specification Reference:

Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 4, May 2018, Volume 4: Model-Specific-Registers (MSR)

Definition in file SandyBridgeMsr.h.

Macro Definition Documentation

IS_SANDY_BRIDGE_PROCESSOR

#define IS_SANDY_BRIDGE_PROCESSOR	(		DisplayFamily,
			DisplayModel
	)

Value:

  (DisplayFamily == 0x06 && \
   (                        \
    DisplayModel == 0x2A || \
    DisplayModel == 0x2D    \
    )                       \
   )

Is Intel processors based on the Sandy Bridge microarchitecture?

Parameters

DisplayFamily	Display Family ID
DisplayModel	Display Model ID

Return values

TRUE	Yes, it is.
FALSE	No, it isn't.

Definition at line 32 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_BOX_CTL

#define MSR_SANDY_BRIDGE_C0_PMON_BOX_CTL   0x00000D04

Package. Uncore C-box 0 perfmon local box wide control.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_BOX_CTL (0x00000D04)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_BOX_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_BOX_CTL, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_BOX_CTL is defined as MSR_C0_PMON_BOX_CTL in SDM.

Definition at line 3195 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_BOX_FILTER

#define MSR_SANDY_BRIDGE_C0_PMON_BOX_FILTER   0x00000D14

Package. Uncore C-box 0 perfmon box wide filter.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_BOX_FILTER (0x00000D14)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_BOX_FILTER);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_BOX_FILTER, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_BOX_FILTER is defined as MSR_C0_PMON_BOX_FILTER in SDM.

Definition at line 3285 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_CTR0

#define MSR_SANDY_BRIDGE_C0_PMON_CTR0   0x00000D16

Package. Uncore C-box 0 perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_CTR0 (0x00000D16)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_CTR0 is defined as MSR_C0_PMON_CTR0 in SDM.

Definition at line 3303 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_CTR1

#define MSR_SANDY_BRIDGE_C0_PMON_CTR1   0x00000D17

Package. Uncore C-box 0 perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_CTR1 (0x00000D17)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_CTR1 is defined as MSR_C0_PMON_CTR1 in SDM.

Definition at line 3321 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_CTR2

#define MSR_SANDY_BRIDGE_C0_PMON_CTR2   0x00000D18

Package. Uncore C-box 0 perfmon counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_CTR2 (0x00000D18)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_CTR2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_CTR2, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_CTR2 is defined as MSR_C0_PMON_CTR2 in SDM.

Definition at line 3339 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_CTR3

#define MSR_SANDY_BRIDGE_C0_PMON_CTR3   0x00000D19

Package. Uncore C-box 0 perfmon counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_CTR3 (0x00000D19)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_CTR3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_CTR3, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_CTR3 is defined as MSR_C0_PMON_CTR3 in SDM.

Definition at line 3357 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL0   0x00000D10

Package. Uncore C-box 0 perfmon event select for C-box 0 counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL0 (0x00000D10)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL0 is defined as MSR_C0_PMON_EVNTSEL0 in SDM.

Definition at line 3213 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL1   0x00000D11

Package. Uncore C-box 0 perfmon event select for C-box 0 counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL1 (0x00000D11)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL1 is defined as MSR_C0_PMON_EVNTSEL1 in SDM.

Definition at line 3231 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL2

#define MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL2   0x00000D12

Package. Uncore C-box 0 perfmon event select for C-box 0 counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL2 (0x00000D12)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL2, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL2 is defined as MSR_C0_PMON_EVNTSEL2 in SDM.

Definition at line 3249 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL3

#define MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL3   0x00000D13

Package. Uncore C-box 0 perfmon event select for C-box 0 counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL3 (0x00000D13)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL3, Msr);

Note

MSR_SANDY_BRIDGE_C0_PMON_EVNTSEL3 is defined as MSR_C0_PMON_EVNTSEL3 in SDM.

Definition at line 3267 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_BOX_CTL

#define MSR_SANDY_BRIDGE_C1_PMON_BOX_CTL   0x00000D24

Package. Uncore C-box 1 perfmon local box wide control.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_BOX_CTL (0x00000D24)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_BOX_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_BOX_CTL, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_BOX_CTL is defined as MSR_C1_PMON_BOX_CTL in SDM.

Definition at line 3375 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_BOX_FILTER

#define MSR_SANDY_BRIDGE_C1_PMON_BOX_FILTER   0x00000D34

Package. Uncore C-box 1 perfmon box wide filter.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_BOX_FILTER (0x00000D34)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_BOX_FILTER);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_BOX_FILTER, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_BOX_FILTER is defined as MSR_C1_PMON_BOX_FILTER in SDM.

Definition at line 3465 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_CTR0

#define MSR_SANDY_BRIDGE_C1_PMON_CTR0   0x00000D36

Package. Uncore C-box 1 perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_CTR0 (0x00000D36)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_CTR0 is defined as MSR_C1_PMON_CTR0 in SDM.

Definition at line 3483 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_CTR1

#define MSR_SANDY_BRIDGE_C1_PMON_CTR1   0x00000D37

Package. Uncore C-box 1 perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_CTR1 (0x00000D37)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_CTR1 is defined as MSR_C1_PMON_CTR1 in SDM.

Definition at line 3501 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_CTR2

#define MSR_SANDY_BRIDGE_C1_PMON_CTR2   0x00000D38

Package. Uncore C-box 1 perfmon counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_CTR2 (0x00000D38)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_CTR2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_CTR2, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_CTR2 is defined as MSR_C1_PMON_CTR2 in SDM.

Definition at line 3519 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_CTR3

#define MSR_SANDY_BRIDGE_C1_PMON_CTR3   0x00000D39

Package. Uncore C-box 1 perfmon counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_CTR3 (0x00000D39)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_CTR3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_CTR3, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_CTR3 is defined as MSR_C1_PMON_CTR3 in SDM.

Definition at line 3537 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL0   0x00000D30

Package. Uncore C-box 1 perfmon event select for C-box 1 counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL0 (0x00000D30)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL0 is defined as MSR_C1_PMON_EVNTSEL0 in SDM.

Definition at line 3393 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL1   0x00000D31

Package. Uncore C-box 1 perfmon event select for C-box 1 counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL1 (0x00000D31)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL1 is defined as MSR_C1_PMON_EVNTSEL1 in SDM.

Definition at line 3411 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL2

#define MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL2   0x00000D32

Package. Uncore C-box 1 perfmon event select for C-box 1 counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL2 (0x00000D32)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL2, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL2 is defined as MSR_C1_PMON_EVNTSEL2 in SDM.

Definition at line 3429 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL3

#define MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL3   0x00000D33

Package. Uncore C-box 1 perfmon event select for C-box 1 counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL3 (0x00000D33)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL3, Msr);

Note

MSR_SANDY_BRIDGE_C1_PMON_EVNTSEL3 is defined as MSR_C1_PMON_EVNTSEL3 in SDM.

Definition at line 3447 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_BOX_CTL

#define MSR_SANDY_BRIDGE_C2_PMON_BOX_CTL   0x00000D44

Package. Uncore C-box 2 perfmon local box wide control.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_BOX_CTL (0x00000D44)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_BOX_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_BOX_CTL, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_BOX_CTL is defined as MSR_C2_PMON_BOX_CTL in SDM.

Definition at line 3555 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_BOX_FILTER

#define MSR_SANDY_BRIDGE_C2_PMON_BOX_FILTER   0x00000D54

Package. Uncore C-box 2 perfmon box wide filter.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_BOX_FILTER (0x00000D54)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_BOX_FILTER);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_BOX_FILTER, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_BOX_FILTER is defined as MSR_C2_PMON_BOX_FILTER in SDM.

Definition at line 3645 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_CTR0

#define MSR_SANDY_BRIDGE_C2_PMON_CTR0   0x00000D56

Package. Uncore C-box 2 perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_CTR0 (0x00000D56)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_CTR0 is defined as MSR_C2_PMON_CTR0 in SDM.

Definition at line 3663 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_CTR1

#define MSR_SANDY_BRIDGE_C2_PMON_CTR1   0x00000D57

Package. Uncore C-box 2 perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_CTR1 (0x00000D57)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_CTR1 is defined as MSR_C2_PMON_CTR1 in SDM.

Definition at line 3681 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_CTR2

#define MSR_SANDY_BRIDGE_C2_PMON_CTR2   0x00000D58

Package. Uncore C-box 2 perfmon counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_CTR2 (0x00000D58)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_CTR2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_CTR2, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_CTR2 is defined as MSR_C2_PMON_CTR2 in SDM.

Definition at line 3699 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_CTR3

#define MSR_SANDY_BRIDGE_C2_PMON_CTR3   0x00000D59

Package. Uncore C-box 2 perfmon counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_CTR3 (0x00000D59)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_CTR3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_CTR3, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_CTR3 is defined as MSR_C2_PMON_CTR3 in SDM.

Definition at line 3717 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL0   0x00000D50

Package. Uncore C-box 2 perfmon event select for C-box 2 counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL0 (0x00000D50)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL0 is defined as MSR_C2_PMON_EVNTSEL0 in SDM.

Definition at line 3573 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL1   0x00000D51

Package. Uncore C-box 2 perfmon event select for C-box 2 counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL1 (0x00000D51)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL1 is defined as MSR_C2_PMON_EVNTSEL1 in SDM.

Definition at line 3591 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL2

#define MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL2   0x00000D52

Package. Uncore C-box 2 perfmon event select for C-box 2 counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL2 (0x00000D52)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL2, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL2 is defined as MSR_C2_PMON_EVNTSEL2 in SDM.

Definition at line 3609 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL3

#define MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL3   0x00000D53

Package. Uncore C-box 2 perfmon event select for C-box 2 counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL3 (0x00000D53)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL3, Msr);

Note

MSR_SANDY_BRIDGE_C2_PMON_EVNTSEL3 is defined as MSR_C2_PMON_EVNTSEL3 in SDM.

Definition at line 3627 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_BOX_CTL

#define MSR_SANDY_BRIDGE_C3_PMON_BOX_CTL   0x00000D64

Package. Uncore C-box 3 perfmon local box wide control.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_BOX_CTL (0x00000D64)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_BOX_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_BOX_CTL, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_BOX_CTL is defined as MSR_C3_PMON_BOX_CTL in SDM.

Definition at line 3735 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_BOX_FILTER

#define MSR_SANDY_BRIDGE_C3_PMON_BOX_FILTER   0x00000D74

Package. Uncore C-box 3 perfmon box wide filter.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_BOX_FILTER (0x00000D74)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_BOX_FILTER);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_BOX_FILTER, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_BOX_FILTER is defined as MSR_C3_PMON_BOX_FILTER in SDM.

Definition at line 3825 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_CTR0

#define MSR_SANDY_BRIDGE_C3_PMON_CTR0   0x00000D76

Package. Uncore C-box 3 perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_CTR0 (0x00000D76)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_CTR0 is defined as MSR_C3_PMON_CTR0 in SDM.

Definition at line 3843 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_CTR1

#define MSR_SANDY_BRIDGE_C3_PMON_CTR1   0x00000D77

Package. Uncore C-box 3 perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_CTR1 (0x00000D77)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_CTR1 is defined as MSR_C3_PMON_CTR1 in SDM.

Definition at line 3861 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_CTR2

#define MSR_SANDY_BRIDGE_C3_PMON_CTR2   0x00000D78

Package. Uncore C-box 3 perfmon counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_CTR2 (0x00000D78)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_CTR2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_CTR2, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_CTR2 is defined as MSR_C3_PMON_CTR2 in SDM.

Definition at line 3879 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_CTR3

#define MSR_SANDY_BRIDGE_C3_PMON_CTR3   0x00000D79

Package. Uncore C-box 3 perfmon counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_CTR3 (0x00000D79)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_CTR3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_CTR3, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_CTR3 is defined as MSR_C3_PMON_CTR3 in SDM.

Definition at line 3897 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL0   0x00000D70

Package. Uncore C-box 3 perfmon event select for C-box 3 counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL0 (0x00000D70)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL0 is defined as MSR_C3_PMON_EVNTSEL0 in SDM.

Definition at line 3753 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL1   0x00000D71

Package. Uncore C-box 3 perfmon event select for C-box 3 counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL1 (0x00000D71)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL1 is defined as MSR_C3_PMON_EVNTSEL1 in SDM.

Definition at line 3771 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL2

#define MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL2   0x00000D72

Package. Uncore C-box 3 perfmon event select for C-box 3 counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL2 (0x00000D72)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL2, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL2 is defined as MSR_C3_PMON_EVNTSEL2 in SDM.

Definition at line 3789 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL3

#define MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL3   0x00000D73

Package. Uncore C-box 3 perfmon event select for C-box 3 counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL3 (0x00000D73)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL3, Msr);

Note

MSR_SANDY_BRIDGE_C3_PMON_EVNTSEL3 is defined as MSR_C3_PMON_EVNTSEL3 in SDM.

Definition at line 3807 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_BOX_CTL

#define MSR_SANDY_BRIDGE_C4_PMON_BOX_CTL   0x00000D84

Package. Uncore C-box 4 perfmon local box wide control.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_BOX_CTL (0x00000D84)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_BOX_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_BOX_CTL, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_BOX_CTL is defined as MSR_C4_PMON_BOX_CTL in SDM.

Definition at line 3915 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_BOX_FILTER

#define MSR_SANDY_BRIDGE_C4_PMON_BOX_FILTER   0x00000D94

Package. Uncore C-box 4 perfmon box wide filter.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_BOX_FILTER (0x00000D94)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_BOX_FILTER);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_BOX_FILTER, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_BOX_FILTER is defined as MSR_C4_PMON_BOX_FILTER in SDM.

Definition at line 4005 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_CTR0

#define MSR_SANDY_BRIDGE_C4_PMON_CTR0   0x00000D96

Package. Uncore C-box 4 perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_CTR0 (0x00000D96)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_CTR0 is defined as MSR_C4_PMON_CTR0 in SDM.

Definition at line 4023 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_CTR1

#define MSR_SANDY_BRIDGE_C4_PMON_CTR1   0x00000D97

Package. Uncore C-box 4 perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_CTR1 (0x00000D97)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_CTR1 is defined as MSR_C4_PMON_CTR1 in SDM.

Definition at line 4041 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_CTR2

#define MSR_SANDY_BRIDGE_C4_PMON_CTR2   0x00000D98

Package. Uncore C-box 4 perfmon counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_CTR2 (0x00000D98)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_CTR2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_CTR2, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_CTR2 is defined as MSR_C4_PMON_CTR2 in SDM.

Definition at line 4059 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_CTR3

#define MSR_SANDY_BRIDGE_C4_PMON_CTR3   0x00000D99

Package. Uncore C-box 4 perfmon counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_CTR3 (0x00000D99)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_CTR3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_CTR3, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_CTR3 is defined as MSR_C4_PMON_CTR3 in SDM.

Definition at line 4077 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL0   0x00000D90

Package. Uncore C-box 4 perfmon event select for C-box 4 counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL0 (0x00000D90)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL0 is defined as MSR_C4_PMON_EVNTSEL0 in SDM.

Definition at line 3933 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL1   0x00000D91

Package. Uncore C-box 4 perfmon event select for C-box 4 counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL1 (0x00000D91)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL1 is defined as MSR_C4_PMON_EVNTSEL1 in SDM.

Definition at line 3951 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL2

#define MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL2   0x00000D92

Package. Uncore C-box 4 perfmon event select for C-box 4 counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL2 (0x00000D92)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL2, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL2 is defined as MSR_C4_PMON_EVNTSEL2 in SDM.

Definition at line 3969 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL3

#define MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL3   0x00000D93

Package. Uncore C-box 4 perfmon event select for C-box 4 counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL3 (0x00000D93)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL3, Msr);

Note

MSR_SANDY_BRIDGE_C4_PMON_EVNTSEL3 is defined as MSR_C4_PMON_EVNTSEL3 in SDM.

Definition at line 3987 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_BOX_CTL

#define MSR_SANDY_BRIDGE_C5_PMON_BOX_CTL   0x00000DA4

Package. Uncore C-box 5 perfmon local box wide control.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_BOX_CTL (0x00000DA4)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_BOX_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_BOX_CTL, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_BOX_CTL is defined as MSR_C5_PMON_BOX_CTL in SDM.

Definition at line 4095 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_BOX_FILTER

#define MSR_SANDY_BRIDGE_C5_PMON_BOX_FILTER   0x00000DB4

Package. Uncore C-box 5 perfmon box wide filter.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_BOX_FILTER (0x00000DB4)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_BOX_FILTER);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_BOX_FILTER, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_BOX_FILTER is defined as MSR_C5_PMON_BOX_FILTER in SDM.

Definition at line 4185 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_CTR0

#define MSR_SANDY_BRIDGE_C5_PMON_CTR0   0x00000DB6

Package. Uncore C-box 5 perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_CTR0 (0x00000DB6)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_CTR0 is defined as MSR_C5_PMON_CTR0 in SDM.

Definition at line 4203 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_CTR1

#define MSR_SANDY_BRIDGE_C5_PMON_CTR1   0x00000DB7

Package. Uncore C-box 5 perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_CTR1 (0x00000DB7)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_CTR1 is defined as MSR_C5_PMON_CTR1 in SDM.

Definition at line 4221 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_CTR2

#define MSR_SANDY_BRIDGE_C5_PMON_CTR2   0x00000DB8

Package. Uncore C-box 5 perfmon counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_CTR2 (0x00000DB8)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_CTR2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_CTR2, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_CTR2 is defined as MSR_C5_PMON_CTR2 in SDM.

Definition at line 4239 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_CTR3

#define MSR_SANDY_BRIDGE_C5_PMON_CTR3   0x00000DB9

Package. Uncore C-box 5 perfmon counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_CTR3 (0x00000DB9)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_CTR3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_CTR3, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_CTR3 is defined as MSR_C5_PMON_CTR3 in SDM.

Definition at line 4257 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL0   0x00000DB0

Package. Uncore C-box 5 perfmon event select for C-box 5 counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL0 (0x00000DB0)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL0 is defined as MSR_C5_PMON_EVNTSEL0 in SDM.

Definition at line 4113 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL1   0x00000DB1

Package. Uncore C-box 5 perfmon event select for C-box 5 counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL1 (0x00000DB1)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL1 is defined as MSR_C5_PMON_EVNTSEL1 in SDM.

Definition at line 4131 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL2

#define MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL2   0x00000DB2

Package. Uncore C-box 5 perfmon event select for C-box 5 counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL2 (0x00000DB2)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL2, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL2 is defined as MSR_C5_PMON_EVNTSEL2 in SDM.

Definition at line 4149 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL3

#define MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL3   0x00000DB3

Package. Uncore C-box 5 perfmon event select for C-box 5 counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL3 (0x00000DB3)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL3, Msr);

Note

MSR_SANDY_BRIDGE_C5_PMON_EVNTSEL3 is defined as MSR_C5_PMON_EVNTSEL3 in SDM.

Definition at line 4167 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_BOX_CTL

#define MSR_SANDY_BRIDGE_C6_PMON_BOX_CTL   0x00000DC4

Package. Uncore C-box 6 perfmon local box wide control.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_BOX_CTL (0x00000DC4)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_BOX_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_BOX_CTL, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_BOX_CTL is defined as MSR_C6_PMON_BOX_CTL in SDM.

Definition at line 4275 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_BOX_FILTER

#define MSR_SANDY_BRIDGE_C6_PMON_BOX_FILTER   0x00000DD4

Package. Uncore C-box 6 perfmon box wide filter.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_BOX_FILTER (0x00000DD4)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_BOX_FILTER);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_BOX_FILTER, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_BOX_FILTER is defined as MSR_C6_PMON_BOX_FILTER in SDM.

Definition at line 4365 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_CTR0

#define MSR_SANDY_BRIDGE_C6_PMON_CTR0   0x00000DD6

Package. Uncore C-box 6 perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_CTR0 (0x00000DD6)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_CTR0 is defined as MSR_C6_PMON_CTR0 in SDM.

Definition at line 4383 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_CTR1

#define MSR_SANDY_BRIDGE_C6_PMON_CTR1   0x00000DD7

Package. Uncore C-box 6 perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_CTR1 (0x00000DD7)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_CTR1 is defined as MSR_C6_PMON_CTR1 in SDM.

Definition at line 4401 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_CTR2

#define MSR_SANDY_BRIDGE_C6_PMON_CTR2   0x00000DD8

Package. Uncore C-box 6 perfmon counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_CTR2 (0x00000DD8)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_CTR2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_CTR2, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_CTR2 is defined as MSR_C6_PMON_CTR2 in SDM.

Definition at line 4419 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_CTR3

#define MSR_SANDY_BRIDGE_C6_PMON_CTR3   0x00000DD9

Package. Uncore C-box 6 perfmon counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_CTR3 (0x00000DD9)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_CTR3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_CTR3, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_CTR3 is defined as MSR_C6_PMON_CTR3 in SDM.

Definition at line 4437 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL0   0x00000DD0

Package. Uncore C-box 6 perfmon event select for C-box 6 counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL0 (0x00000DD0)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL0 is defined as MSR_C6_PMON_EVNTSEL0 in SDM.

Definition at line 4293 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL1   0x00000DD1

Package. Uncore C-box 6 perfmon event select for C-box 6 counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL1 (0x00000DD1)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL1 is defined as MSR_C6_PMON_EVNTSEL1 in SDM.

Definition at line 4311 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL2

#define MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL2   0x00000DD2

Package. Uncore C-box 6 perfmon event select for C-box 6 counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL2 (0x00000DD2)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL2, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL2 is defined as MSR_C6_PMON_EVNTSEL2 in SDM.

Definition at line 4329 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL3

#define MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL3   0x00000DD3

Package. Uncore C-box 6 perfmon event select for C-box 6 counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL3 (0x00000DD3)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL3, Msr);

Note

MSR_SANDY_BRIDGE_C6_PMON_EVNTSEL3 is defined as MSR_C6_PMON_EVNTSEL3 in SDM.

Definition at line 4347 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_BOX_CTL

#define MSR_SANDY_BRIDGE_C7_PMON_BOX_CTL   0x00000DE4

Package. Uncore C-box 7 perfmon local box wide control.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_BOX_CTL (0x00000DE4)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_BOX_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_BOX_CTL, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_BOX_CTL is defined as MSR_C7_PMON_BOX_CTL in SDM.

Definition at line 4455 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_BOX_FILTER

#define MSR_SANDY_BRIDGE_C7_PMON_BOX_FILTER   0x00000DF4

Package. Uncore C-box 7 perfmon box wide filter.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_BOX_FILTER (0x00000DF4)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_BOX_FILTER);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_BOX_FILTER, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_BOX_FILTER is defined as MSR_C7_PMON_BOX_FILTER in SDM.

Definition at line 4545 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_CTR0

#define MSR_SANDY_BRIDGE_C7_PMON_CTR0   0x00000DF6

Package. Uncore C-box 7 perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_CTR0 (0x00000DF6)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_CTR0 is defined as MSR_C7_PMON_CTR0 in SDM.

Definition at line 4563 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_CTR1

#define MSR_SANDY_BRIDGE_C7_PMON_CTR1   0x00000DF7

Package. Uncore C-box 7 perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_CTR1 (0x00000DF7)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_CTR1 is defined as MSR_C7_PMON_CTR1 in SDM.

Definition at line 4581 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_CTR2

#define MSR_SANDY_BRIDGE_C7_PMON_CTR2   0x00000DF8

Package. Uncore C-box 7 perfmon counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_CTR2 (0x00000DF8)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_CTR2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_CTR2, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_CTR2 is defined as MSR_C7_PMON_CTR2 in SDM.

Definition at line 4599 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_CTR3

#define MSR_SANDY_BRIDGE_C7_PMON_CTR3   0x00000DF9

Package. Uncore C-box 7 perfmon counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_CTR3 (0x00000DF9)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_CTR3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_CTR3, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_CTR3 is defined as MSR_C7_PMON_CTR3 in SDM.

Definition at line 4617 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL0   0x00000DF0

Package. Uncore C-box 7 perfmon event select for C-box 7 counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL0 (0x00000DF0)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL0 is defined as MSR_C7_PMON_EVNTSEL0 in SDM.

Definition at line 4473 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL1   0x00000DF1

Package. Uncore C-box 7 perfmon event select for C-box 7 counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL1 (0x00000DF1)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL1 is defined as MSR_C7_PMON_EVNTSEL1 in SDM.

Definition at line 4491 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL2

#define MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL2   0x00000DF2

Package. Uncore C-box 7 perfmon event select for C-box 7 counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL2 (0x00000DF2)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL2, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL2 is defined as MSR_C7_PMON_EVNTSEL2 in SDM.

Definition at line 4509 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL3

#define MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL3   0x00000DF3

Package. Uncore C-box 7 perfmon event select for C-box 7 counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL3 (0x00000DF3)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL3, Msr);

Note

MSR_SANDY_BRIDGE_C7_PMON_EVNTSEL3 is defined as MSR_C7_PMON_EVNTSEL3 in SDM.

Definition at line 4527 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_CORE_C3_RESIDENCY

#define MSR_SANDY_BRIDGE_CORE_C3_RESIDENCY   0x000003FC

Core. Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates. CORE C3 Residency Counter. (R/O) Value since last reset that this core is in processor-specific C3 states. Count at the same frequency as the TSC.

Parameters

ECX	MSR_SANDY_BRIDGE_CORE_C3_RESIDENCY (0x000003FC)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_CORE_C3_RESIDENCY);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_CORE_C3_RESIDENCY, Msr);

Note

MSR_SANDY_BRIDGE_CORE_C3_RESIDENCY is defined as MSR_CORE_C3_RESIDENCY in SDM.

Definition at line 1383 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_CORE_C6_RESIDENCY

#define MSR_SANDY_BRIDGE_CORE_C6_RESIDENCY   0x000003FD

Core. Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates. CORE C6 Residency Counter. (R/O) Value since last reset that this core is in processor-specific C6 states. Count at the same frequency as the TSC.

Parameters

ECX	MSR_SANDY_BRIDGE_CORE_C6_RESIDENCY (0x000003FD)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_CORE_C6_RESIDENCY);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_CORE_C6_RESIDENCY, Msr);

Note

MSR_SANDY_BRIDGE_CORE_C6_RESIDENCY is defined as MSR_CORE_C6_RESIDENCY in SDM.

Definition at line 1404 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_CORE_C7_RESIDENCY

#define MSR_SANDY_BRIDGE_CORE_C7_RESIDENCY   0x000003FE

Core. Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates. CORE C7 Residency Counter. (R/O) Value since last reset that this core is in processor-specific C7 states. Count at the same frequency as the TSC.

Parameters

ECX	MSR_SANDY_BRIDGE_CORE_C7_RESIDENCY (0x000003FE)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_CORE_C7_RESIDENCY);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_CORE_C7_RESIDENCY, Msr);

Note

MSR_SANDY_BRIDGE_CORE_C7_RESIDENCY is defined as MSR_CORE_C7_RESIDENCY in SDM.

Definition at line 1425 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_DRAM_ENERGY_STATUS

#define MSR_SANDY_BRIDGE_DRAM_ENERGY_STATUS   0x00000619

Package. DRAM Energy Status (R/O) See Section 14.9.5, "DRAM RAPL Domain.".

Parameters

ECX	MSR_SANDY_BRIDGE_DRAM_ENERGY_STATUS (0x00000619)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_DRAM_ENERGY_STATUS);

Note

MSR_SANDY_BRIDGE_DRAM_ENERGY_STATUS is defined as MSR_DRAM_ENERGY_STATUS in SDM.

Definition at line 2853 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_DRAM_PERF_STATUS

#define MSR_SANDY_BRIDGE_DRAM_PERF_STATUS   0x0000061B

Package. DRAM Performance Throttling Status (R/O) See Section 14.9.5, "DRAM RAPL Domain.".

Parameters

ECX	MSR_SANDY_BRIDGE_DRAM_PERF_STATUS (0x0000061B)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_DRAM_PERF_STATUS);

Note

MSR_SANDY_BRIDGE_DRAM_PERF_STATUS is defined as MSR_DRAM_PERF_STATUS in SDM.

Definition at line 2871 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_DRAM_POWER_INFO

#define MSR_SANDY_BRIDGE_DRAM_POWER_INFO   0x0000061C

Package. DRAM RAPL Parameters (R/W) See Section 14.9.5, "DRAM RAPL Domain.".

Parameters

ECX	MSR_SANDY_BRIDGE_DRAM_POWER_INFO (0x0000061C)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_DRAM_POWER_INFO);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_DRAM_POWER_INFO, Msr);

Note

MSR_SANDY_BRIDGE_DRAM_POWER_INFO is defined as MSR_DRAM_POWER_INFO in SDM.

Definition at line 2889 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_DRAM_POWER_LIMIT

#define MSR_SANDY_BRIDGE_DRAM_POWER_LIMIT   0x00000618

Package. DRAM RAPL Power Limit Control (R/W) See Section 14.9.5, "DRAM RAPL Domain.".

Parameters

ECX	MSR_SANDY_BRIDGE_DRAM_POWER_LIMIT (0x00000618)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_DRAM_POWER_LIMIT);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_DRAM_POWER_LIMIT, Msr);

Note

MSR_SANDY_BRIDGE_DRAM_POWER_LIMIT is defined as MSR_DRAM_POWER_LIMIT in SDM.

Definition at line 2836 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_ERROR_CONTROL

#define MSR_SANDY_BRIDGE_ERROR_CONTROL   0x0000017F

Package. MC Bank Error Configuration (R/W).

Parameters

ECX	MSR_SANDY_BRIDGE_ERROR_CONTROL (0x0000017F)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_ERROR_CONTROL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_ERROR_CONTROL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_ERROR_CONTROL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_ERROR_CONTROL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_ERROR_CONTROL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_ERROR_CONTROL is defined as MSR_ERROR_CONTROL in SDM.

Definition at line 2726 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_FEATURE_CONFIG

#define MSR_SANDY_BRIDGE_FEATURE_CONFIG   0x0000013C

Core. AES Configuration (RW-L) Privileged post-BIOS agent must provide a #GP handler to handle unsuccessful read of this MSR.

Parameters

ECX	MSR_SANDY_BRIDGE_FEATURE_CONFIG (0x0000013C)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER.

Example usage

MSR_SANDY_BRIDGE_FEATURE_CONFIG_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_FEATURE_CONFIG, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_FEATURE_CONFIG is defined as MSR_FEATURE_CONFIG in SDM.

Definition at line 318 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION

#define MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION   0x0000019A

Thread. Clock Modulation (R/W) See Table 2-2. IA32_CLOCK_MODULATION MSR was originally named IA32_THERM_CONTROL MSR.

Parameters

ECX	MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION (0x0000019A)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER.

Example usage

MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_IA32_CLOCK_MODULATION is defined as IA32_CLOCK_MODULATION in SDM.

Definition at line 438 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_MC4_CTL

#define MSR_SANDY_BRIDGE_IA32_MC4_CTL   0x00000410

Core. See Section 15.3.2.1, "IA32_MCi_CTL MSRs.".

Parameters

ECX	MSR_SANDY_BRIDGE_IA32_MC4_CTL (0x00000410)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_IA32_MC4_CTL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_IA32_MC4_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_IA32_MC4_CTL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_IA32_MC4_CTL is defined as IA32_MC4_CTL in SDM.

Definition at line 1445 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_MC4_CTL2

#define MSR_SANDY_BRIDGE_IA32_MC4_CTL2   0x00000284

Package. Always 0 (CMCI not supported).

Parameters

ECX	MSR_SANDY_BRIDGE_IA32_MC4_CTL2 (0x00000284)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_IA32_MC4_CTL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_IA32_MC4_CTL2, Msr);

Note

MSR_SANDY_BRIDGE_IA32_MC4_CTL2 is defined as IA32_MC4_CTL2 in SDM.

Definition at line 904 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_MISC_ENABLE

#define MSR_SANDY_BRIDGE_IA32_MISC_ENABLE   0x000001A0

Enable Misc. Processor Features (R/W) Allows a variety of processor functions to be enabled and disabled.

Parameters

ECX	MSR_SANDY_BRIDGE_IA32_MISC_ENABLE (0x000001A0)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_MISC_ENABLE_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_MISC_ENABLE_REGISTER.

Example usage

MSR_SANDY_BRIDGE_IA32_MISC_ENABLE_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_IA32_MISC_ENABLE);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_IA32_MISC_ENABLE, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_IA32_MISC_ENABLE is defined as IA32_MISC_ENABLE in SDM.

Definition at line 490 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL

#define MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL   0x0000038F

Thread. See Table 2-2. See Section 18.6.2.2, "Global Counter Control Facilities.".

Parameters

ECX	MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL (0x0000038F)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_CTRL is defined as IA32_PERF_GLOBAL_CTRL in SDM.

Definition at line 1019 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL

#define MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL   0x00000390

See Table 2-2. See Section 18.6.2.2, "Global Counter Control Facilities.".

Parameters

ECX	MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL (0x00000390)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_OVF_CTRL is defined as IA32_PERF_GLOBAL_OVF_CTRL in SDM.

Definition at line 1105 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS

#define MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS   0x0000038E

See Table 2-2. See Section 18.6.2.2, "Global Counter Control Facilities.".

Parameters

ECX	MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS (0x0000038E)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER.

Example usage

MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_IA32_PERF_GLOBAL_STATUS is defined as IA32_PERF_GLOBAL_STATUS in SDM.

Definition at line 924 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_PERFEVTSEL4

#define MSR_SANDY_BRIDGE_IA32_PERFEVTSEL4   0x0000018A

Core. See Table 2-2. If CPUID.0AH:EAX[15:8] = 8.

Parameters

ECX	MSR_SANDY_BRIDGE_IA32_PERFEVTSELn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_IA32_PERFEVTSEL4);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_IA32_PERFEVTSEL4, Msr);

Note

MSR_SANDY_BRIDGE_IA32_PERFEVTSEL4 is defined as IA32_PERFEVTSEL4 in SDM. MSR_SANDY_BRIDGE_IA32_PERFEVTSEL5 is defined as IA32_PERFEVTSEL5 in SDM. MSR_SANDY_BRIDGE_IA32_PERFEVTSEL6 is defined as IA32_PERFEVTSEL6 in SDM. MSR_SANDY_BRIDGE_IA32_PERFEVTSEL7 is defined as IA32_PERFEVTSEL7 in SDM.

Definition at line 371 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_PERFEVTSEL5

#define MSR_SANDY_BRIDGE_IA32_PERFEVTSEL5   0x0000018B

Definition at line 372 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_PERFEVTSEL6

#define MSR_SANDY_BRIDGE_IA32_PERFEVTSEL6   0x0000018C

Definition at line 373 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_PERFEVTSEL7

#define MSR_SANDY_BRIDGE_IA32_PERFEVTSEL7   0x0000018D

Definition at line 374 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_IA32_VMX_EPT_VPID_ENUM

#define MSR_SANDY_BRIDGE_IA32_VMX_EPT_VPID_ENUM   0x0000048C

Thread. Capability Reporting Register of EPT and VPID (R/O) See Table 2-2.

Parameters

ECX	MSR_SANDY_BRIDGE_IA32_VMX_EPT_VPID_ENUM (0x0000048C)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_IA32_VMX_EPT_VPID_ENUM);

Note

MSR_SANDY_BRIDGE_IA32_VMX_EPT_VPID_ENUM is defined as IA32_VMX_EPT_VPID_ENUM in SDM.

Definition at line 1498 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_0_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_0_FROM_IP   0x00000680

Thread. Last Branch Record n From IP (R/W) One of sixteen pairs of last branch record registers on the last branch record stack. This part of the stack contains pointers to the source instruction. See also: - Last Branch Record Stack TOS at 1C9H - Section 17.7.1 and record format in Section 17.4.8.1.

Parameters

ECX	MSR_SANDY_BRIDGE_LASTBRANCH_n_FROM_IP
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_LASTBRANCH_0_FROM_IP);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_LASTBRANCH_0_FROM_IP, Msr);

Note

MSR_SANDY_BRIDGE_LASTBRANCH_0_FROM_IP is defined as MSR_LASTBRANCH_0_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_1_FROM_IP is defined as MSR_LASTBRANCH_1_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_2_FROM_IP is defined as MSR_LASTBRANCH_2_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_3_FROM_IP is defined as MSR_LASTBRANCH_3_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_4_FROM_IP is defined as MSR_LASTBRANCH_4_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_5_FROM_IP is defined as MSR_LASTBRANCH_5_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_6_FROM_IP is defined as MSR_LASTBRANCH_6_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_7_FROM_IP is defined as MSR_LASTBRANCH_7_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_8_FROM_IP is defined as MSR_LASTBRANCH_8_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_9_FROM_IP is defined as MSR_LASTBRANCH_9_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_10_FROM_IP is defined as MSR_LASTBRANCH_10_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_11_FROM_IP is defined as MSR_LASTBRANCH_11_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_12_FROM_IP is defined as MSR_LASTBRANCH_12_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_13_FROM_IP is defined as MSR_LASTBRANCH_13_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_14_FROM_IP is defined as MSR_LASTBRANCH_14_FROM_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_15_FROM_IP is defined as MSR_LASTBRANCH_15_FROM_IP in SDM.

Definition at line 1794 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_0_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_0_TO_IP   0x000006C0

Thread. Last Branch Record n To IP (R/W) One of sixteen pairs of last branch record registers on the last branch record stack. This part of the stack contains pointers to the destination instruction.

Parameters

ECX	MSR_SANDY_BRIDGE_LASTBRANCH_n_TO_IP
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_LASTBRANCH_0_TO_IP);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_LASTBRANCH_0_TO_IP, Msr);

Note

MSR_SANDY_BRIDGE_LASTBRANCH_0_TO_IP is defined as MSR_LASTBRANCH_0_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_1_TO_IP is defined as MSR_LASTBRANCH_1_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_2_TO_IP is defined as MSR_LASTBRANCH_2_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_3_TO_IP is defined as MSR_LASTBRANCH_3_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_4_TO_IP is defined as MSR_LASTBRANCH_4_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_5_TO_IP is defined as MSR_LASTBRANCH_5_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_6_TO_IP is defined as MSR_LASTBRANCH_6_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_7_TO_IP is defined as MSR_LASTBRANCH_7_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_8_TO_IP is defined as MSR_LASTBRANCH_8_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_9_TO_IP is defined as MSR_LASTBRANCH_9_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_10_TO_IP is defined as MSR_LASTBRANCH_10_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_11_TO_IP is defined as MSR_LASTBRANCH_11_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_12_TO_IP is defined as MSR_LASTBRANCH_12_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_13_TO_IP is defined as MSR_LASTBRANCH_13_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_14_TO_IP is defined as MSR_LASTBRANCH_14_TO_IP in SDM. MSR_SANDY_BRIDGE_LASTBRANCH_15_TO_IP is defined as MSR_LASTBRANCH_15_TO_IP in SDM.

Definition at line 1846 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_10_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_10_FROM_IP   0x0000068A

Definition at line 1804 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_10_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_10_TO_IP   0x000006CA

Definition at line 1856 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_11_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_11_FROM_IP   0x0000068B

Definition at line 1805 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_11_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_11_TO_IP   0x000006CB

Definition at line 1857 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_12_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_12_FROM_IP   0x0000068C

Definition at line 1806 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_12_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_12_TO_IP   0x000006CC

Definition at line 1858 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_13_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_13_FROM_IP   0x0000068D

Definition at line 1807 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_13_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_13_TO_IP   0x000006CD

Definition at line 1859 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_14_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_14_FROM_IP   0x0000068E

Definition at line 1808 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_14_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_14_TO_IP   0x000006CE

Definition at line 1860 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_15_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_15_FROM_IP   0x0000068F

Definition at line 1809 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_15_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_15_TO_IP   0x000006CF

Definition at line 1861 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_1_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_1_FROM_IP   0x00000681

Definition at line 1795 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_1_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_1_TO_IP   0x000006C1

Definition at line 1847 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_2_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_2_FROM_IP   0x00000682

Definition at line 1796 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_2_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_2_TO_IP   0x000006C2

Definition at line 1848 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_3_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_3_FROM_IP   0x00000683

Definition at line 1797 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_3_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_3_TO_IP   0x000006C3

Definition at line 1849 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_4_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_4_FROM_IP   0x00000684

Definition at line 1798 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_4_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_4_TO_IP   0x000006C4

Definition at line 1850 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_5_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_5_FROM_IP   0x00000685

Definition at line 1799 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_5_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_5_TO_IP   0x000006C5

Definition at line 1851 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_6_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_6_FROM_IP   0x00000686

Definition at line 1800 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_6_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_6_TO_IP   0x000006C6

Definition at line 1852 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_7_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_7_FROM_IP   0x00000687

Definition at line 1801 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_7_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_7_TO_IP   0x000006C7

Definition at line 1853 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_8_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_8_FROM_IP   0x00000688

Definition at line 1802 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_8_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_8_TO_IP   0x000006C8

Definition at line 1854 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_9_FROM_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_9_FROM_IP   0x00000689

Definition at line 1803 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_9_TO_IP

#define MSR_SANDY_BRIDGE_LASTBRANCH_9_TO_IP   0x000006C9

Definition at line 1855 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LASTBRANCH_TOS

#define MSR_SANDY_BRIDGE_LASTBRANCH_TOS   0x000001C9

Thread. Last Branch Record Stack TOS (R/W) Contains an index (bits 0-3) that points to the MSR containing the most recent branch record. See MSR_LASTBRANCH_0_FROM_IP (at 680H).

Parameters

ECX	MSR_SANDY_BRIDGE_LASTBRANCH_TOS (0x000001C9)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_LASTBRANCH_TOS);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_LASTBRANCH_TOS, Msr);

Note

MSR_SANDY_BRIDGE_LASTBRANCH_TOS is defined as MSR_LASTBRANCH_TOS in SDM.

Definition at line 829 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LBR_SELECT

#define MSR_SANDY_BRIDGE_LBR_SELECT   0x000001C8

Thread. Last Branch Record Filtering Select Register (R/W) See Section 17.9.2, "Filtering of Last Branch Records.".

Parameters

ECX	MSR_SANDY_BRIDGE_LBR_SELECT (0x000001C8)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_LBR_SELECT_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_LBR_SELECT_REGISTER.

Example usage

MSR_SANDY_BRIDGE_LBR_SELECT_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_LBR_SELECT);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_LBR_SELECT, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_LBR_SELECT is defined as MSR_LBR_SELECT in SDM.

Definition at line 752 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LER_FROM_LIP

#define MSR_SANDY_BRIDGE_LER_FROM_LIP   0x000001DD

Thread. Last Exception Record From Linear IP (R) Contains a pointer to the last branch instruction that the processor executed prior to the last exception that was generated or the last interrupt that was handled.

Parameters

ECX	MSR_SANDY_BRIDGE_LER_FROM_LIP (0x000001DD)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_LER_FROM_LIP);

Note

MSR_SANDY_BRIDGE_LER_FROM_LIP is defined as MSR_LER_FROM_LIP in SDM.

Definition at line 848 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_LER_TO_LIP

#define MSR_SANDY_BRIDGE_LER_TO_LIP   0x000001DE

Thread. Last Exception Record To Linear IP (R) This area contains a pointer to the target of the last branch instruction that the processor executed prior to the last exception that was generated or the last interrupt that was handled.

Parameters

ECX	MSR_SANDY_BRIDGE_LER_TO_LIP (0x000001DE)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_LER_TO_LIP);

Note

MSR_SANDY_BRIDGE_LER_TO_LIP is defined as MSR_LER_TO_LIP in SDM.

Definition at line 868 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL

#define MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL   0x000001A4

Miscellaneous Feature Control (R/W).

Parameters

ECX	MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL (0x000001A4)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_MISC_FEATURE_CONTROL is defined as MSR_MISC_FEATURE_CONTROL in SDM.

Definition at line 631 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_MISC_PWR_MGMT

#define MSR_SANDY_BRIDGE_MISC_PWR_MGMT   0x000001AA

See http://biosbits.org.

Parameters

ECX	MSR_SANDY_BRIDGE_MISC_PWR_MGMT (0x000001AA)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_MISC_PWR_MGMT);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_MISC_PWR_MGMT, Msr);

Note

MSR_SANDY_BRIDGE_MISC_PWR_MGMT is defined as MSR_MISC_PWR_MGMT in SDM.

Definition at line 731 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_OFFCORE_RSP_0

#define MSR_SANDY_BRIDGE_OFFCORE_RSP_0   0x000001A6

Thread. Offcore Response Event Select Register (R/W).

Parameters

ECX	MSR_SANDY_BRIDGE_OFFCORE_RSP_0 (0x000001A6)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_OFFCORE_RSP_0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_OFFCORE_RSP_0, Msr);

Note

MSR_SANDY_BRIDGE_OFFCORE_RSP_0 is defined as MSR_OFFCORE_RSP_0 in SDM.

Definition at line 695 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_OFFCORE_RSP_1

#define MSR_SANDY_BRIDGE_OFFCORE_RSP_1   0x000001A7

Thread. Offcore Response Event Select Register (R/W).

Parameters

ECX	MSR_SANDY_BRIDGE_OFFCORE_RSP_1 (0x000001A7)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_OFFCORE_RSP_1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_OFFCORE_RSP_1, Msr);

Note

MSR_SANDY_BRIDGE_OFFCORE_RSP_1 is defined as MSR_OFFCORE_RSP_1 in SDM.

Definition at line 713 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_BOX_CTL

#define MSR_SANDY_BRIDGE_PCU_PMON_BOX_CTL   0x00000C24

Package. Uncore PCU perfmon for PCU-box-wide control.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_BOX_CTL (0x00000C24)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_BOX_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_BOX_CTL, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_BOX_CTL is defined as MSR_PCU_PMON_BOX_CTL in SDM.

Definition at line 3015 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_BOX_FILTER

#define MSR_SANDY_BRIDGE_PCU_PMON_BOX_FILTER   0x00000C34

Package. Uncore PCU perfmon box-wide filter.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_BOX_FILTER (0x00000C34)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_BOX_FILTER);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_BOX_FILTER, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_BOX_FILTER is defined as MSR_PCU_PMON_BOX_FILTER in SDM.

Definition at line 3105 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_CTR0

#define MSR_SANDY_BRIDGE_PCU_PMON_CTR0   0x00000C36

Package. Uncore PCU perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_CTR0 (0x00000C36)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_CTR0 is defined as MSR_PCU_PMON_CTR0 in SDM.

Definition at line 3123 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_CTR1

#define MSR_SANDY_BRIDGE_PCU_PMON_CTR1   0x00000C37

Package. Uncore PCU perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_CTR1 (0x00000C37)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_CTR1 is defined as MSR_PCU_PMON_CTR1 in SDM.

Definition at line 3141 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_CTR2

#define MSR_SANDY_BRIDGE_PCU_PMON_CTR2   0x00000C38

Package. Uncore PCU perfmon counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_CTR2 (0x00000C38)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_CTR2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_CTR2, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_CTR2 is defined as MSR_PCU_PMON_CTR2 in SDM.

Definition at line 3159 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_CTR3

#define MSR_SANDY_BRIDGE_PCU_PMON_CTR3   0x00000C39

Package. Uncore PCU perfmon counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_CTR3 (0x00000C39)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_CTR3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_CTR3, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_CTR3 is defined as MSR_PCU_PMON_CTR3 in SDM.

Definition at line 3177 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL0   0x00000C30

Package. Uncore PCU perfmon event select for PCU counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL0 (0x00000C30)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL0 is defined as MSR_PCU_PMON_EVNTSEL0 in SDM.

Definition at line 3033 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL1   0x00000C31

Package. Uncore PCU perfmon event select for PCU counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL1 (0x00000C31)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL1 is defined as MSR_PCU_PMON_EVNTSEL1 in SDM.

Definition at line 3051 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL2

#define MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL2   0x00000C32

Package. Uncore PCU perfmon event select for PCU counter 2.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL2 (0x00000C32)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL2);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL2, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL2 is defined as MSR_PCU_PMON_EVNTSEL2 in SDM.

Definition at line 3069 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL3

#define MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL3   0x00000C33

Package. Uncore PCU perfmon event select for PCU counter 3.

Parameters

ECX	MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL3 (0x00000C33)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL3);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL3, Msr);

Note

MSR_SANDY_BRIDGE_PCU_PMON_EVNTSEL3 is defined as MSR_PCU_PMON_EVNTSEL3 in SDM.

Definition at line 3087 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PEBS_ENABLE

#define MSR_SANDY_BRIDGE_PEBS_ENABLE   0x000003F1

Thread. See Section 18.3.1.1.1, "Processor Event Based Sampling (PEBS).".

Parameters

ECX	MSR_SANDY_BRIDGE_PEBS_ENABLE (0x000003F1)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PEBS_ENABLE_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PEBS_ENABLE_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PEBS_ENABLE_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PEBS_ENABLE);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PEBS_ENABLE, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PEBS_ENABLE is defined as MSR_PEBS_ENABLE in SDM.

Definition at line 1199 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PEBS_LD_LAT

#define MSR_SANDY_BRIDGE_PEBS_LD_LAT   0x000003F6

Thread. See Section 18.3.1.1.2, "Load Latency Performance Monitoring Facility.".

Parameters

ECX	MSR_SANDY_BRIDGE_PEBS_LD_LAT (0x000003F6)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PEBS_LD_LAT_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PEBS_LD_LAT);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PEBS_LD_LAT, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PEBS_LD_LAT is defined as MSR_PEBS_LD_LAT in SDM.

Definition at line 1273 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PEBS_NUM_ALT

#define MSR_SANDY_BRIDGE_PEBS_NUM_ALT   0x0000039C

Package.

Parameters

ECX	MSR_SANDY_BRIDGE_PEBS_NUM_ALT (0x0000039C)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PEBS_NUM_ALT_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PEBS_NUM_ALT_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PEBS_NUM_ALT_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PEBS_NUM_ALT);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PEBS_NUM_ALT, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PEBS_NUM_ALT is defined as MSR_PEBS_NUM_ALT in SDM.

Definition at line 2773 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PERF_STATUS

#define MSR_SANDY_BRIDGE_PERF_STATUS   0x00000198

Package.

Parameters

ECX	MSR_SANDY_BRIDGE_PERF_STATUS (0x00000198)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PERF_STATUS_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PERF_STATUS_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PERF_STATUS_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PERF_STATUS);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PERF_STATUS, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PERF_STATUS is defined as MSR_PERF_STATUS in SDM.

Definition at line 395 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKG_C2_RESIDENCY

#define MSR_SANDY_BRIDGE_PKG_C2_RESIDENCY   0x0000060D

Package. Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates. Package C2 Residency Counter. (R/O) Value since last reset that this package is in processor-specific C2 states. Count at the same frequency as the TSC.

Parameters

ECX	MSR_SANDY_BRIDGE_PKG_C2_RESIDENCY (0x0000060D)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKG_C2_RESIDENCY);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKG_C2_RESIDENCY, Msr);

Note

MSR_SANDY_BRIDGE_PKG_C2_RESIDENCY is defined as MSR_PKG_C2_RESIDENCY in SDM.

Definition at line 1664 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKG_C3_RESIDENCY

#define MSR_SANDY_BRIDGE_PKG_C3_RESIDENCY   0x000003F8

Package. Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates. Package C3 Residency Counter. (R/O) Value since last reset that this package is in processor-specific C3 states. Count at the same frequency as the TSC.

Parameters

ECX	MSR_SANDY_BRIDGE_PKG_C3_RESIDENCY (0x000003F8)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKG_C3_RESIDENCY);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKG_C3_RESIDENCY, Msr);

Note

MSR_SANDY_BRIDGE_PKG_C3_RESIDENCY is defined as MSR_PKG_C3_RESIDENCY in SDM.

Definition at line 1320 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKG_C6_RESIDENCY

#define MSR_SANDY_BRIDGE_PKG_C6_RESIDENCY   0x000003F9

Package. Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates. Package C6 Residency Counter. (R/O) Value since last reset that this package is in processor-specific C6 states. Count at the same frequency as the TSC.

Parameters

ECX	MSR_SANDY_BRIDGE_PKG_C6_RESIDENCY (0x000003F9)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKG_C6_RESIDENCY);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKG_C6_RESIDENCY, Msr);

Note

MSR_SANDY_BRIDGE_PKG_C6_RESIDENCY is defined as MSR_PKG_C6_RESIDENCY in SDM.

Definition at line 1341 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKG_C7_RESIDENCY

#define MSR_SANDY_BRIDGE_PKG_C7_RESIDENCY   0x000003FA

Package. Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates. Package C7 Residency Counter. (R/O) Value since last reset that this package is in processor-specific C7 states. Count at the same frequency as the TSC.

Parameters

ECX	MSR_SANDY_BRIDGE_PKG_C7_RESIDENCY (0x000003FA)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKG_C7_RESIDENCY);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKG_C7_RESIDENCY, Msr);

Note

MSR_SANDY_BRIDGE_PKG_C7_RESIDENCY is defined as MSR_PKG_C7_RESIDENCY in SDM.

Definition at line 1362 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL

#define MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL   0x000000E2

Core. C-State Configuration Control (R/W) Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates. See http://biosbits.org.

Parameters

ECX	MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL (0x000000E2)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PKG_CST_CONFIG_CONTROL is defined as MSR_PKG_CST_CONFIG_CONTROL in SDM.

Definition at line 170 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKG_ENERGY_STATUS

#define MSR_SANDY_BRIDGE_PKG_ENERGY_STATUS   0x00000611

Package. PKG Energy Status (R/O) See Section 14.9.3, "Package RAPL Domain.".

Parameters

ECX	MSR_SANDY_BRIDGE_PKG_ENERGY_STATUS (0x00000611)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKG_ENERGY_STATUS);

Note

MSR_SANDY_BRIDGE_PKG_ENERGY_STATUS is defined as MSR_PKG_ENERGY_STATUS in SDM.

Definition at line 1700 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKG_PERF_STATUS

#define MSR_SANDY_BRIDGE_PKG_PERF_STATUS   0x00000613

Package. Package RAPL Perf Status (R/O).

Parameters

ECX	MSR_SANDY_BRIDGE_PKG_PERF_STATUS (0x00000613)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKG_PERF_STATUS);

Note

MSR_SANDY_BRIDGE_PKG_PERF_STATUS is defined as MSR_PKG_PERF_STATUS in SDM.

Definition at line 2817 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKG_POWER_INFO

#define MSR_SANDY_BRIDGE_PKG_POWER_INFO   0x00000614

Package. PKG RAPL Parameters (R/W) See Section 14.9.3, "Package RAPL Domain.".

Parameters

ECX	MSR_SANDY_BRIDGE_PKG_POWER_INFO (0x00000614)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKG_POWER_INFO);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKG_POWER_INFO, Msr);

Note

MSR_SANDY_BRIDGE_PKG_POWER_INFO is defined as MSR_PKG_POWER_INFO in SDM.

Definition at line 1719 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKG_POWER_LIMIT

#define MSR_SANDY_BRIDGE_PKG_POWER_LIMIT   0x00000610

Package. PKG RAPL Power Limit Control (R/W) See Section 14.9.3, "Package RAPL Domain.".

Parameters

ECX	MSR_SANDY_BRIDGE_PKG_POWER_LIMIT (0x00000610)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKG_POWER_LIMIT);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKG_POWER_LIMIT, Msr);

Note

MSR_SANDY_BRIDGE_PKG_POWER_LIMIT is defined as MSR_PKG_POWER_LIMIT in SDM.

Definition at line 1683 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKGC3_IRTL

#define MSR_SANDY_BRIDGE_PKGC3_IRTL   0x0000060A

Package. Package C3 Interrupt Response Limit (R/W) Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates.

Parameters

ECX	MSR_SANDY_BRIDGE_PKGC3_IRTL (0x0000060A)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PKGC3_IRTL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PKGC3_IRTL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PKGC3_IRTL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKGC3_IRTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKGC3_IRTL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PKGC3_IRTL is defined as MSR_PKGC3_IRTL in SDM.

Definition at line 1538 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKGC6_IRTL

#define MSR_SANDY_BRIDGE_PKGC6_IRTL   0x0000060B

Package. Package C6 Interrupt Response Limit (R/W) This MSR defines the budget allocated for the package to exit from C6 to a C0 state, where interrupt request can be delivered to the core and serviced. Additional core-exit latency amy be applicable depending on the actual C-state the core is in. Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates.

Parameters

ECX	MSR_SANDY_BRIDGE_PKGC6_IRTL (0x0000060B)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PKGC6_IRTL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKGC6_IRTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKGC6_IRTL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PKGC6_IRTL is defined as MSR_PKGC6_IRTL in SDM.

Definition at line 1603 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PKGC7_IRTL

#define MSR_SANDY_BRIDGE_PKGC7_IRTL   0x0000060C

Package. Package C7 Interrupt Response Limit (R/W) This MSR defines the budget allocated for the package to exit from C7 to a C0 state, where interrupt request can be delivered to the core and serviced. Additional core-exit latency amy be applicable depending on the actual C-state the core is in. Note: C-state values are processor specific C-state code names, unrelated to MWAIT extension C-state parameters or ACPI CStates.

Parameters

ECX	MSR_SANDY_BRIDGE_PKGC7_IRTL (0x0000060C)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PKGC7_IRTL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PKGC7_IRTL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PKGC7_IRTL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PKGC7_IRTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PKGC7_IRTL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PKGC7_IRTL is defined as MSR_PKGC7_IRTL in SDM.

Definition at line 2303 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PLATFORM_INFO

#define MSR_SANDY_BRIDGE_PLATFORM_INFO   0x000000CE

Package. Platform Information Contains power management and other model specific features enumeration. See http://biosbits.org.

Parameters

ECX	MSR_SANDY_BRIDGE_PLATFORM_INFO (0x000000CE)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PLATFORM_INFO_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PLATFORM_INFO_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PLATFORM_INFO_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PLATFORM_INFO);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PLATFORM_INFO, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PLATFORM_INFO is defined as MSR_PLATFORM_INFO in SDM.

Definition at line 102 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE

#define MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE   0x000000E4

Core. Power Management IO Redirection in C-state (R/W) See http://biosbits.org.

Parameters

ECX	MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE (0x000000E4)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE_REGISTER.

Example usage

MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_PMG_IO_CAPTURE_BASE is defined as MSR_PMG_IO_CAPTURE_BASE in SDM.

Definition at line 259 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_POWER_CTL

#define MSR_SANDY_BRIDGE_POWER_CTL   0x000001FC

Core. See http://biosbits.org.

Parameters

ECX	MSR_SANDY_BRIDGE_POWER_CTL (0x000001FC)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_POWER_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_POWER_CTL, Msr);

Note

MSR_SANDY_BRIDGE_POWER_CTL is defined as MSR_POWER_CTL in SDM.

Definition at line 886 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PP0_ENERGY_STATUS

#define MSR_SANDY_BRIDGE_PP0_ENERGY_STATUS   0x00000639

Package. PP0 Energy Status (R/O) See Section 14.9.4, "PP0/PP1 RAPL Domains.".

Parameters

ECX	MSR_SANDY_BRIDGE_PP0_ENERGY_STATUS (0x00000639)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PP0_ENERGY_STATUS);

Note

MSR_SANDY_BRIDGE_PP0_ENERGY_STATUS is defined as MSR_PP0_ENERGY_STATUS in SDM.

Definition at line 1756 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PP0_POLICY

#define MSR_SANDY_BRIDGE_PP0_POLICY   0x0000063A

Package. PP0 Balance Policy (R/W) See Section 14.9.4, "PP0/PP1 RAPL Domains.".

Parameters

ECX	MSR_SANDY_BRIDGE_PP0_POLICY (0x0000063A)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PP0_POLICY);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PP0_POLICY, Msr);

Note

MSR_SANDY_BRIDGE_PP0_POLICY is defined as MSR_PP0_POLICY in SDM.

Definition at line 2362 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PP0_POWER_LIMIT

#define MSR_SANDY_BRIDGE_PP0_POWER_LIMIT   0x00000638

Package. PP0 RAPL Power Limit Control (R/W) See Section 14.9.4, "PP0/PP1 RAPL Domains.".

Parameters

ECX	MSR_SANDY_BRIDGE_PP0_POWER_LIMIT (0x00000638)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PP0_POWER_LIMIT);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PP0_POWER_LIMIT, Msr);

Note

MSR_SANDY_BRIDGE_PP0_POWER_LIMIT is defined as MSR_PP0_POWER_LIMIT in SDM.

Definition at line 1738 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PP1_ENERGY_STATUS

#define MSR_SANDY_BRIDGE_PP1_ENERGY_STATUS   0x00000641

Package. PP1 Energy Status (R/O) See Section 14.9.4, "PP0/PP1 RAPL Domains.".

Parameters

ECX	MSR_SANDY_BRIDGE_PP1_ENERGY_STATUS (0x00000641)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PP1_ENERGY_STATUS);

Note

MSR_SANDY_BRIDGE_PP1_ENERGY_STATUS is defined as MSR_PP1_ENERGY_STATUS in SDM.

Definition at line 2399 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PP1_POLICY

#define MSR_SANDY_BRIDGE_PP1_POLICY   0x00000642

Package. PP1 Balance Policy (R/W) See Section 14.9.4, "PP0/PP1 RAPL Domains.".

Parameters

ECX	MSR_SANDY_BRIDGE_PP1_POLICY (0x00000642)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PP1_POLICY);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PP1_POLICY, Msr);

Note

MSR_SANDY_BRIDGE_PP1_POLICY is defined as MSR_PP1_POLICY in SDM.

Definition at line 2418 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_PP1_POWER_LIMIT

#define MSR_SANDY_BRIDGE_PP1_POWER_LIMIT   0x00000640

Package. PP1 RAPL Power Limit Control (R/W) See Section 14.9.4, "PP0/PP1 RAPL Domains.".

Parameters

ECX	MSR_SANDY_BRIDGE_PP1_POWER_LIMIT (0x00000640)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_PP1_POWER_LIMIT);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_PP1_POWER_LIMIT, Msr);

Note

MSR_SANDY_BRIDGE_PP1_POWER_LIMIT is defined as MSR_PP1_POWER_LIMIT in SDM.

Definition at line 2381 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_RAPL_POWER_UNIT

#define MSR_SANDY_BRIDGE_RAPL_POWER_UNIT   0x00000606

Package. Unit Multipliers used in RAPL Interfaces (R/O) See Section 14.9.1, "RAPL Interfaces.".

Parameters

ECX	MSR_SANDY_BRIDGE_RAPL_POWER_UNIT (0x00000606)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_RAPL_POWER_UNIT);

Note

MSR_SANDY_BRIDGE_RAPL_POWER_UNIT is defined as MSR_RAPL_POWER_UNIT in SDM.

Definition at line 1516 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_SMI_COUNT

#define MSR_SANDY_BRIDGE_SMI_COUNT   0x00000034

Thread. SMI Counter (R/O).

Parameters

ECX	MSR_SANDY_BRIDGE_SMI_COUNT (0x00000034)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_SMI_COUNT_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_SMI_COUNT_REGISTER.

Example usage

MSR_SANDY_BRIDGE_SMI_COUNT_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_SMI_COUNT);

Note

MSR_SANDY_BRIDGE_SMI_COUNT is defined as MSR_SMI_COUNT in SDM.

Definition at line 57 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_TEMPERATURE_TARGET

#define MSR_SANDY_BRIDGE_TEMPERATURE_TARGET   0x000001A2

Unique.

Parameters

ECX	MSR_SANDY_BRIDGE_TEMPERATURE_TARGET (0x000001A2)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_TEMPERATURE_TARGET_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_TEMPERATURE_TARGET_REGISTER.

Example usage

MSR_SANDY_BRIDGE_TEMPERATURE_TARGET_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_TEMPERATURE_TARGET);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_TEMPERATURE_TARGET, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_TEMPERATURE_TARGET is defined as MSR_TEMPERATURE_TARGET in SDM.

Definition at line 584 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT

#define MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT   0x000001AD

Package. Maximum Ratio Limit of Turbo Mode RO if MSR_PLATFORM_INFO.[28] = 0, RW if MSR_PLATFORM_INFO.[28] = 1.

Parameters

ECX	MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT (0x000001AD)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT_REGISTER.

Example usage

MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT);

Note

MSR_SANDY_BRIDGE_TURBO_RATIO_LIMIT is defined as MSR_TURBO_RATIO_LIMIT in SDM.

Definition at line 1882 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_U_PMON_CTR0

#define MSR_SANDY_BRIDGE_U_PMON_CTR0   0x00000C16

Package. Uncore U-box perfmon counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_U_PMON_CTR0 (0x00000C16)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_U_PMON_CTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_U_PMON_CTR0, Msr);

Note

MSR_SANDY_BRIDGE_U_PMON_CTR0 is defined as MSR_U_PMON_CTR0 in SDM.

Definition at line 2979 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_U_PMON_CTR1

#define MSR_SANDY_BRIDGE_U_PMON_CTR1   0x00000C17

Package. Uncore U-box perfmon counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_U_PMON_CTR1 (0x00000C17)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_U_PMON_CTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_U_PMON_CTR1, Msr);

Note

MSR_SANDY_BRIDGE_U_PMON_CTR1 is defined as MSR_U_PMON_CTR1 in SDM.

Definition at line 2997 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_U_PMON_EVNTSEL0

#define MSR_SANDY_BRIDGE_U_PMON_EVNTSEL0   0x00000C10

Package. Uncore U-box perfmon event select for U-box counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_U_PMON_EVNTSEL0 (0x00000C10)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_U_PMON_EVNTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_U_PMON_EVNTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_U_PMON_EVNTSEL0 is defined as MSR_U_PMON_EVNTSEL0 in SDM.

Definition at line 2943 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_U_PMON_EVNTSEL1

#define MSR_SANDY_BRIDGE_U_PMON_EVNTSEL1   0x00000C11

Package. Uncore U-box perfmon event select for U-box counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_U_PMON_EVNTSEL1 (0x00000C11)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_U_PMON_EVNTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_U_PMON_EVNTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_U_PMON_EVNTSEL1 is defined as MSR_U_PMON_EVNTSEL1 in SDM.

Definition at line 2961 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTL

#define MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTL   0x00000C08

Package. Uncore U-box UCLK fixed counter control.

Parameters

ECX	MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTL (0x00000C08)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTL, Msr);

Note

MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTL is defined as MSR_U_PMON_UCLK_FIXED_CTL in SDM.

Definition at line 2907 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTR

#define MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTR   0x00000C09

Package. Uncore U-box UCLK fixed counter.

Parameters

ECX	MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTR (0x00000C09)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTR);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTR, Msr);

Note

MSR_SANDY_BRIDGE_U_PMON_UCLK_FIXED_CTR is defined as MSR_U_PMON_UCLK_FIXED_CTR in SDM.

Definition at line 2925 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR0

#define MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR0   0x000003B0

Package. Uncore Arb unit, performance counter 0.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR0 (0x000003B0)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR0 is defined as MSR_UNC_ARB_PERFCTR0 in SDM.

Definition at line 2224 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR1

#define MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR1   0x000003B1

Package. Uncore Arb unit, performance counter 1.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR1 (0x000003B1)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR1, Msr);

Note

MSR_SANDY_BRIDGE_UNC_ARB_PERFCTR1 is defined as MSR_UNC_ARB_PERFCTR1 in SDM.

Definition at line 2242 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL0

#define MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL0   0x000003B2

Package. Uncore Arb unit, counter 0 event select MSR.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL0 (0x000003B2)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL0 is defined as MSR_UNC_ARB_PERFEVTSEL0 in SDM.

Definition at line 2260 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL1

#define MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL1   0x000003B3

Package. Uncore Arb unit, counter 1 event select MSR.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL1 (0x000003B3)
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL1);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL1, Msr);

Note

MSR_SANDY_BRIDGE_UNC_ARB_PERFEVTSEL1 is defined as MSR_UNC_ARB_PERFEVTSEL1 in SDM.

Definition at line 2278 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR0

#define MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR0   0x00000706

Package. Uncore C-Box 0, performance counter n.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTRn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR0 is defined as MSR_UNC_CBO_0_PERFCTR0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR1 is defined as MSR_UNC_CBO_0_PERFCTR1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR2 is defined as MSR_UNC_CBO_0_PERFCTR2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR3 is defined as MSR_UNC_CBO_0_PERFCTR3 in SDM.

Definition at line 2494 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR1

#define MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR1   0x00000707

Definition at line 2495 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR2

#define MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR2   0x00000708

Definition at line 2496 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR3

#define MSR_SANDY_BRIDGE_UNC_CBO_0_PERFCTR3   0x00000709

Definition at line 2497 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL0

#define MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL0   0x00000700

Package. Uncore C-Box 0, counter n event select MSR.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSELn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL0 is defined as MSR_UNC_CBO_0_PERFEVTSEL0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL1 is defined as MSR_UNC_CBO_0_PERFEVTSEL1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL2 is defined as MSR_UNC_CBO_0_PERFEVTSEL2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL3 is defined as MSR_UNC_CBO_0_PERFEVTSEL3 in SDM.

Definition at line 2440 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL1

#define MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL1   0x00000701

Definition at line 2441 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL2

#define MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL2   0x00000702

Definition at line 2442 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL3

#define MSR_SANDY_BRIDGE_UNC_CBO_0_PERFEVTSEL3   0x00000703

Definition at line 2443 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_0_UNIT_STATUS

#define MSR_SANDY_BRIDGE_UNC_CBO_0_UNIT_STATUS   0x00000705

Package. Uncore C-Box n, unit status for counter 0-3.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_n_UNIT_STATUS
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_0_UNIT_STATUS);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_0_UNIT_STATUS, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_0_UNIT_STATUS is defined as MSR_UNC_CBO_0_UNIT_STATUS in SDM. MSR_SANDY_BRIDGE_UNC_CBO_1_UNIT_STATUS is defined as MSR_UNC_CBO_1_UNIT_STATUS in SDM. MSR_SANDY_BRIDGE_UNC_CBO_2_UNIT_STATUS is defined as MSR_UNC_CBO_2_UNIT_STATUS in SDM. MSR_SANDY_BRIDGE_UNC_CBO_3_UNIT_STATUS is defined as MSR_UNC_CBO_3_UNIT_STATUS in SDM. MSR_SANDY_BRIDGE_UNC_CBO_4_UNIT_STATUS is defined as MSR_UNC_CBO_4_UNIT_STATUS in SDM.

Definition at line 2467 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR0

#define MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR0   0x00000716

Package. Uncore C-Box 1, performance counter n.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTRn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR0 is defined as MSR_UNC_CBO_1_PERFCTR0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR1 is defined as MSR_UNC_CBO_1_PERFCTR1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR2 is defined as MSR_UNC_CBO_1_PERFCTR2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR3 is defined as MSR_UNC_CBO_1_PERFCTR3 in SDM.

Definition at line 2546 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR1

#define MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR1   0x00000717

Definition at line 2547 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR2

#define MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR2   0x00000718

Definition at line 2548 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR3

#define MSR_SANDY_BRIDGE_UNC_CBO_1_PERFCTR3   0x00000719

Definition at line 2549 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL0

#define MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL0   0x00000710

Package. Uncore C-Box 1, counter n event select MSR.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSELn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL0 is defined as MSR_UNC_CBO_1_PERFEVTSEL0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL1 is defined as MSR_UNC_CBO_1_PERFEVTSEL1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL2 is defined as MSR_UNC_CBO_1_PERFEVTSEL2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL3 is defined as MSR_UNC_CBO_1_PERFEVTSEL3 in SDM.

Definition at line 2520 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL1

#define MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL1   0x00000711

Definition at line 2521 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL2

#define MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL2   0x00000712

Definition at line 2522 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL3

#define MSR_SANDY_BRIDGE_UNC_CBO_1_PERFEVTSEL3   0x00000713

Definition at line 2523 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_1_UNIT_STATUS

#define MSR_SANDY_BRIDGE_UNC_CBO_1_UNIT_STATUS   0x00000715

Definition at line 2468 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR0

#define MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR0   0x00000726

Package. Uncore C-Box 2, performance counter n.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTRn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR0 is defined as MSR_UNC_CBO_2_PERFCTR0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR1 is defined as MSR_UNC_CBO_2_PERFCTR1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR2 is defined as MSR_UNC_CBO_2_PERFCTR2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR3 is defined as MSR_UNC_CBO_2_PERFCTR3 in SDM.

Definition at line 2598 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR1

#define MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR1   0x00000727

Definition at line 2599 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR2

#define MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR2   0x00000728

Definition at line 2600 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR3

#define MSR_SANDY_BRIDGE_UNC_CBO_2_PERFCTR3   0x00000729

Definition at line 2601 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL0

#define MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL0   0x00000720

Package. Uncore C-Box 2, counter n event select MSR.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSELn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL0 is defined as MSR_UNC_CBO_2_PERFEVTSEL0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL1 is defined as MSR_UNC_CBO_2_PERFEVTSEL1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL2 is defined as MSR_UNC_CBO_2_PERFEVTSEL2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL3 is defined as MSR_UNC_CBO_2_PERFEVTSEL3 in SDM.

Definition at line 2572 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL1

#define MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL1   0x00000721

Definition at line 2573 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL2

#define MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL2   0x00000722

Definition at line 2574 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL3

#define MSR_SANDY_BRIDGE_UNC_CBO_2_PERFEVTSEL3   0x00000723

Definition at line 2575 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_2_UNIT_STATUS

#define MSR_SANDY_BRIDGE_UNC_CBO_2_UNIT_STATUS   0x00000725

Definition at line 2469 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR0

#define MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR0   0x00000736

Package. Uncore C-Box 3, performance counter n.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTRn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR0 is defined as MSR_UNC_CBO_3_PERFCTR0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR1 is defined as MSR_UNC_CBO_3_PERFCTR1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR2 is defined as MSR_UNC_CBO_3_PERFCTR2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR3 is defined as MSR_UNC_CBO_3_PERFCTR3 in SDM.

Definition at line 2650 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR1

#define MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR1   0x00000737

Definition at line 2651 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR2

#define MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR2   0x00000738

Definition at line 2652 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR3

#define MSR_SANDY_BRIDGE_UNC_CBO_3_PERFCTR3   0x00000739

Definition at line 2653 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL0

#define MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL0   0x00000730

Package. Uncore C-Box 3, counter n event select MSR.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSELn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL0 is defined as MSR_UNC_CBO_3_PERFEVTSEL0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL1 is defined as MSR_UNC_CBO_3_PERFEVTSEL1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL2 is defined as MSR_UNC_CBO_3_PERFEVTSEL2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL3 is defined as MSR_UNC_CBO_3_PERFEVTSEL3 in SDM.

Definition at line 2624 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL1

#define MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL1   0x00000731

Definition at line 2625 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL2

#define MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL2   0x00000732

Definition at line 2626 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL3

#define MSR_SANDY_BRIDGE_UNC_CBO_3_PERFEVTSEL3   0x00000733

Definition at line 2627 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_3_UNIT_STATUS

#define MSR_SANDY_BRIDGE_UNC_CBO_3_UNIT_STATUS   0x00000735

Definition at line 2470 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR0

#define MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR0   0x00000746

Package. Uncore C-Box 4, performance counter n.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTRn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR0 is defined as MSR_UNC_CBO_4_PERFCTR0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR1 is defined as MSR_UNC_CBO_4_PERFCTR1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR2 is defined as MSR_UNC_CBO_4_PERFCTR2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR3 is defined as MSR_UNC_CBO_4_PERFCTR3 in SDM.

Definition at line 2702 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR1

#define MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR1   0x00000747

Definition at line 2703 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR2

#define MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR2   0x00000748

Definition at line 2704 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR3

#define MSR_SANDY_BRIDGE_UNC_CBO_4_PERFCTR3   0x00000749

Definition at line 2705 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL0

#define MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL0   0x00000740

Package. Uncore C-Box 4, counter n event select MSR.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSELn
EAX	Lower 32-bits of MSR value.
EDX	Upper 32-bits of MSR value.

Example usage

UINT64  Msr;
 
Msr = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL0);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL0, Msr);

Note

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL0 is defined as MSR_UNC_CBO_4_PERFEVTSEL0 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL1 is defined as MSR_UNC_CBO_4_PERFEVTSEL1 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL2 is defined as MSR_UNC_CBO_4_PERFEVTSEL2 in SDM. MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL3 is defined as MSR_UNC_CBO_4_PERFEVTSEL3 in SDM.

Definition at line 2676 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL1

#define MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL1   0x00000741

Definition at line 2677 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL2

#define MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL2   0x00000742

Definition at line 2678 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL3

#define MSR_SANDY_BRIDGE_UNC_CBO_4_PERFEVTSEL3   0x00000743

Definition at line 2679 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_4_UNIT_STATUS

#define MSR_SANDY_BRIDGE_UNC_CBO_4_UNIT_STATUS   0x00000745

Definition at line 2471 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_CBO_CONFIG

#define MSR_SANDY_BRIDGE_UNC_CBO_CONFIG   0x00000396

Package. Uncore C-Box configuration information (R/O).

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_CBO_CONFIG (0x00000396)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_CBO_CONFIG_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_CBO_CONFIG_REGISTER.

Example usage

MSR_SANDY_BRIDGE_UNC_CBO_CONFIG_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_CBO_CONFIG);

Note

MSR_SANDY_BRIDGE_UNC_CBO_CONFIG is defined as MSR_UNC_CBO_CONFIG in SDM.

Definition at line 2180 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR

#define MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR   0x00000395

Package. Uncore fixed counter.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR (0x00000395)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR_REGISTER.

Example usage

MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTR is defined as MSR_UNC_PERF_FIXED_CTR in SDM.

Definition at line 2137 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL

#define MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL   0x00000394

Package. Uncore fixed counter control (R/W).

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL (0x00000394)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_UNC_PERF_FIXED_CTRL is defined as MSR_UNC_PERF_FIXED_CTRL in SDM.

Definition at line 2086 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL

#define MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL   0x00000391

Package. Uncore PMU global control.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL (0x00000391)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL_REGISTER.

Example usage

MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_CTRL is defined as MSR_UNC_PERF_GLOBAL_CTRL in SDM.

Definition at line 1957 of file SandyBridgeMsr.h.

MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS

#define MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS   0x00000392

Package. Uncore PMU main status.

Parameters

ECX	MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS (0x00000392)
EAX	Lower 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS_REGISTER.
EDX	Upper 32-bits of MSR value. Described by the type MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS_REGISTER.

Example usage

MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS_REGISTER  Msr;
 
Msr.Uint64 = AsmReadMsr64 (MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS);
AsmWriteMsr64 (MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS, Msr.Uint64);

Note

MSR_SANDY_BRIDGE_UNC_PERF_GLOBAL_STATUS is defined as MSR_UNC_PERF_GLOBAL_STATUS in SDM.

Definition at line 2031 of file SandyBridgeMsr.h.